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AS8NVLC512K32QC-20XT 参数 Datasheet PDF下载

AS8NVLC512K32QC-20XT图片预览
型号: AS8NVLC512K32QC-20XT
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×32模块的nvSRAM 3.3V高速SRAM与非易失性存储 [512K x 32 Module nvSRAM 3.3V High Speed SRAM with Non-Volatile Storage]
分类和应用: 存储静态存储器
文件页数/大小: 17 页 / 362 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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SEMICONDUCTOR, INC.  
ADVANCE INFORMATION  
nvSRAM  
AS8nvLC512K32  
Austin Semiconductor, Inc.  
Software Controlled STORE/RECALL Cycle  
In the following table, the software controlled STORE and RECALL cycle parameters are listed.  
24, 25  
20ns  
25ns  
Max  
45ns  
Parameters  
tRC  
Description  
STORE/RECALLInitiationCycleTime  
AddressSetupTime  
Min  
Max  
Min  
25  
0
Min  
45  
0
Max  
Unit  
ns  
20  
0
tSA  
ns  
tCW  
ClockPulseWidth  
15  
0
25  
0
30  
0
ns  
tHA  
AddressHoldTime  
ns  
tRECALL  
RECALLDuration  
200  
200  
200  
μs  
Switching Waveforms  
CE\ and OE \Controlled Software STORE/RECALL Cycle25  
W5&  
W5&  
$GGUHVV  
&(  
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W&:  
$GGUHVVꢀꢍꢊ  
W&:  
W6$  
W+$  
W+$  
W+$  
W6$  
W+$  
2(  
W+++'  
W+=&(  
+6%ꢀꢎ6725(ꢀRQO\ꢏ  
'4ꢀꢎ'$7$ꢏ  
W'(/$<  
W/=&(  
W/=+6%  
+LJKꢀ,PSHGDQFH  
W6725(ꢅW5(&$//  
5:,  
AutoStore Enable/Disable Cycle  
W5&  
W5&  
$GGUHVV  
$GGUHVVꢀꢍꢇ  
W&:  
$GGUHVVꢀꢍꢊ  
W&:  
W6$  
&(  
2(  
W+$  
W+$  
W+$  
W6$  
W+$  
W66  
W+=&(  
W/=&(  
W'(/$<  
'4ꢀꢎ'$7$ꢏ  
5:,  
Notes  
24. The software sequence is clocked with CE\ controlled or OE\ controlled reads.  
25. The six consecutive addresses must be read in the order listed in the MODE Selection Table. WE\ must be HIGH during all six consecutive cycles.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8nvLC512K32  
Rev. 0.0 08/09  
13