SDRAM
AS4SD4M16
Austin Semiconductor, Inc.
READ -- DQM OPERATION1
T0
T1
T2
T3
T4
T5
T6
T7
T8
t
CL
CLK
CKE
t
t
CK
CH
t
t
CKS
CKH
t
t
CMS
CMH
ACTIVE
NOP
NOP
NOP
NOP
NOP
NOP
NOP
READ
COMMAND
t
t
CMS
CMH
DQM /
DQML,
DQMH
t
t
t
t
AS
AH
A0-A9,
A11
COLUMN m2
ROW
t
AS
AH
ENABLE AUTO PRECHARGE
ROW
A10
t
DISABLE AUTO PRECHARGE
AS
AH
BANK
BANK
BA0, BA1
t
t
AC
OH
t
t
t
AC
t
OH
AC
OH
DOUT
m
DOUT m+2
DOUT m+3
DQ
t
LZ
CAS Latency
t
t
t
HZ
LZ
HZ
t
RCD
Don’t Care
Undefined
TIMING PARAMETERS
-8
-10
-8
-10
MIN
MAX
6.5
MIN
MAX
7
SYMBOL*
tAC(3)
UNITS
MIN
1
MAX
MIN
MAX
SYMBOL*
tCMH
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
3
tAC(2)
tAH
9
9
tCMS
tHZ(3)
tHZ(2)
tLZ
2
ns
ns
ns
ns
ns
ns
1
2
1
3
6
7
8
tAS
10
tCH
3
3.5
3.5
10
15
1
1
1
tCL
3
tOH
2.5
20
2.5
30
tCK(3)
tCK(2)
tCKH
tCKS
8
tRCD
12
1
2
3
* CAS latency indicated in parentheseses.
NOTE: 1. For this example, the burst length = 4 , the CAS latency = 2.
2. x16: A8, A9 and A11 = “Don’t Care.”
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS4SD4M16
Rev. 2.1 6/05
43
AUSTIN [ AUSTIN SEMICONDUCTOR ]
