SDRAM
AS4SD4M16
Austin Semiconductor, Inc.
ALTERNATING BANKWRITE ACCESSES1
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
t
CL
CLK
CKE
t
t
CK
CH
t
t
CKS
CKH
t
t
CMS
CMH
NOP
NOP
NOP
ACTIVE
ACTIVE
ACTIVE
NOP
NOP
COMMAND
WRITE
WRITE
t
t
CMS
CMH
DQM /
DQML,
DQMH
t
t
t
t
AH
AS
COLUMN
m3
COLUMN b3
A0-A9,
A11
ROW
ROW
ROW
ROW
t
AS
AH
ENABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
ROW
ROW
A10
BA0, BA1
DQ
t
AS
AH
BANK 0
BANK 0
BANK 0
BANK 1
BANK 1
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DH
t
DH
t
DS
DH
DS
DS
DS
DS
DH
DS
DH
DS
DH
DS
DH
DH
DIN
m
DIN b
DIN m+2
DIN m+3
DIN b+1
DIN b+2
DIN b+3
DIN m+1
t
t
RCD - BANK 0
t
t
RP - BANK 0
RCD - BANK 0
RAS - BANK 0
RC - BANK 0
WR - BANK 0
t
t
t
Don’t Care
Undefined
t
t
WR - BANK 1
RRD
RCD - BANK 1
TIMING PARAMETERS
-8
-10
-8
-10
MIN
1
MAX
MIN
1
MAX
SYMBOL*
tAH
UNITS
MIN
1
MAX
MIN
1
MAX
SYMBOL*
tDH
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAS
2
3
3
3.5
3.5
10
15
1
2
2
ns
ns
ns
ns
ns
ns
tDS
tCH
50
80
20
24
20
80,000
60
90
30
30
20
80,000
tRAS
tRC
tRCD
tRP
tCL
3
tCK(3)
tCK(2)
tCKH
tCKS
tCMH
tCMS
8
12
1
tRRD
2
3
1 CLK+
8ns
1 CLK+
8ns
tWR
ns
1
1
2
3
* CAS latency indicated in parentheseses.
NOTES: 1. For this example, the burst length = 4, i.e., two-clock minimum for tWR
.
2. Requires once clock plus time (8ns) with AUTO PRECHARGE or 15ns with PRECHARGE.
3. x16: A8, A9 and A11 = “Don’t Care.”
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS4SD4M16
Rev. 2.1 6/05
46
AUSTIN [ AUSTIN SEMICONDUCTOR ]
