SDRAM
AS4SD4M16
Austin Semiconductor, Inc.
READ --WITH AUTO PRECHARGE1
T3
T4
T5
T6
T7
T8
T0
T1
T2
CL
t
CLK
CKE
t
t
CK
CH
t
t
CKS
CKH
t
t
CMS
CMH
ACTIVE
NOP
READ
NOP
NOP
NOP
ACTIVE
NOP
NOP
COMMAND
t
t
CMS
CMH
DQM /
DQML, DQMH
t
t
AS
AH
A0-A9,
A11
COLUMN m2
ROW
ROW
t
t
AS
AH
ENABLE AUTO PRECHARGE
ROW
ROW
A10
t
t
AS
AH
BANK
BANK
BA0, BA1
BANK
t
AC
AC
AC
t
t
t
t
t
OH
AC
OH
OH
OH
DOUT
m
DOUT m+2
DOUT m+1
DOUT m+3
DQ
t
t
LZ
HZ
t
t
CAS Latency
RCD
RP
t
RAS
t
RC
Don’t Care
Undefined
TIMING PARAMETERS
-8
-10
-8
-10
-8
-10
S
Y
M
B
O
L
*
M
I
N
MAX
6.5
MIN
MAX
7
UNITS
ns
t
t
t
t
t
t
t
t
t
AC(3)
AC(2)
AH
9
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
2
1
3
AS
CH
3
3.5
3.5
10
15
1
CL
3
CK(3)
CK(2)
CKH
8
MIN
MAX
MIN
MAX
MIN
1
MAX
MIN
MAX
SYMBOL*
tAC(3)
UNITS
SYMBOL*
UNITS
12
1
t
CKS
2
3
tCMH
tCMS
tHZ(3)
tHZ(2)
tLZ
6.5
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAC(2)
tAH
9
9
2
1
2
1
3
6
7
8
tAS
10
tCH
3
3.5
3.5
10
15
1
1
1
tCL
tOH
3
2.5
50
80
20
24
2.5
60
90
30
30
tCK(3)
tCK(2)
tCKH
tCKS
tRAS
tRC
tRCD
tRP
8
80,000
80,000
12
1
2
3
* CAS latency indicated in parentheseses.
NOTE: 1. For this example, the burst length = 4, the CAS latency = 2.
2. x16: A8, A9 and A11 = “Don’t Care.”
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS4SD4M16
Rev. 2.1 6/05
40
AUSTIN [ AUSTIN SEMICONDUCTOR ]
