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AS4SD4M16DG-10/XT 参数 Datasheet PDF下载

AS4SD4M16DG-10/XT图片预览
型号: AS4SD4M16DG-10/XT
PDF下载: 下载PDF文件 查看货源
内容描述: 4梅格×16 SDRAM同步动态随机存取存储 [4 Meg x 16 SDRAM Synchronous DRAM Memory]
分类和应用: 存储内存集成电路光电二极管动态存储器时钟
文件页数/大小: 50 页 / 1139 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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SDRAM  
AS4SD4M16  
Austin Semiconductor, Inc.  
Fixed-length or full-page WRITE bursts can be  
PRECHARGE  
truncated with the BURST TERMINATE command. When  
truncating a WRITE burst, the input data applied coincident  
with the BURST TERMINATE command will be ignored. The  
last data written (provided that DQM is LOW at that time) will  
be the input data applied one clock previous to the BURST  
TERMINATE command. This is shown in Figure 19, where data  
n is the last desired data element of a longer burst.  
The PRECHARGE command is used to deactivate the  
open row in a particular bank or the open row in all banks. The  
bank(s) will be available for a subsequent row access some  
specified time (tRP) after the PRECHARGE command is issued.  
Input A10 determines whether one or all banks are to be  
precharged, and in the case where only one bank is to be  
precharged, inputs BA0, BA1 select the bank. When all banks  
are to be precharged, inputs BA0, BA1 are treated as “Don’t  
Care.” Once a bank has been precharged, it is in the idle state  
and must be activated prior to any READ or WRITE commands  
being issued to that bank.  
T0  
T1  
T2  
CLK  
POWER-DOWN  
Power-down occurs if CKE is registered LOW  
coincident with a NOP or COMMAND INHIBIT when no  
accesses are in progress. If power-down occurs when all banks  
are idle, this mode is referred to as precharge power-down; if  
power-down occurs when there is a row active in either bank,  
this mode is referred to as active power-down. Entering power-  
down deactivates the input and output buffers, excluding CKE,  
for maximum power savings while in standby. The device may  
not remain in the power-down state longer than the refresh  
period (64ms/16ms) since no refresh operations are performed  
in this mode.  
BURST  
TERMI-  
NATE  
NEXT  
COMMAND  
WRITE  
COMMAND  
BANK,  
COL n  
(ADDRESS)  
ADDRESS  
DIN  
n
(DATA)  
DQ  
NOTE: DQMs is LOW.  
Figure 19  
TERMINATING A WRITE BURST  
The power-down state is exited by registering a NOP  
or COMMAND INHIBIT and CKE HIGH at the desired clock  
edge (meeting tCKS).  
CLK  
HIGH  
CKE  
CS\  
CLK  
RAS\  
CAS\  
t
>t  
CKS  
CKS  
CKE  
WE\  
A0-A9  
COMMAND  
NOP  
ALL BANKS  
NOP  
ACTIVE  
A10  
BA  
All banks idle  
BANK SELECTED  
BANK ADDRESS  
t
t
t
RCD  
RAS  
RC  
Input buffers gated off  
Enter power-down mode.  
Exit power-down mode.  
DON’T CARE  
Figure 20  
PRECHARGE COMMAND  
Figure 21  
POWER-DOWN  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS4SD4M16  
Rev. 1.5 10/01  
21  
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