SDRAM
AS4SD2M32
Austin Semiconductor, Inc.
TRUTH TABLE 2: CKE1,2,3,4
CKEn-1 CKEn CURRENT STATE
COMMANDn
ACTIONn
NOTES
Power-Down
X
X
X
Maintain Power-Down
Maintain Self Refresh
Maintain Clock Suspend
L
L
L
Self Refresh
Clock Suspend
Power-Down
COMMAND INHIBIT or NOP Exit Power-Down
COMMAND INHIBIT or NOP Exit Self Refresh
5
6
7
H
Self Refresh
Clock Suspend
All Banks Idle
All Banks Idle
Reading or Writing
X
Exit Clock Suspend
COMMAND INHIBIT or NOP Power-Down Entry
H
L
AUTO REFRESH
VALID
Self Refresh Entry
Clock Suspend Entry
H
H
See Truth Table 3
NOTES:
1. CKEn is the logic state of CKE at clock edge n; CKEn-1 was the state of CKE at the previous clock edge.
2. Current state is the state of the SDRAM immediately prior to clock edge n.
3. COMMANDn is the command registered at clock edge n, and ACTIONn is a result of COMMANDn.
4. All states and sequences not shown are illegal or reserved.
5. Exiting power-down at clock edge n will put the device in the all banks idle state in time for clock edge n+1 (provided
that tCKS is met).
6. Exiting self refresh at clock edge n will put the device in the all banks idle state once tXSR is met. COMMAND INHIBIT or NOP
commands should be issued on any clock edges occurring during the tXSR period. A minimum of two NOP commands must be
provided during tXSR period.
7. After exiting clock suspend at clock edge n, the device will resume operation and recognize the next command at clock
edge n+1.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS4SD2M32
Rev. 1.0 1/08
22
AUSTIN [ AUSTIN SEMICONDUCTOR ]
