欢迎访问ic37.com |
会员登录 免费注册
发布采购

AS4SD2M32DGX-6XT 参数 Datasheet PDF下载

AS4SD2M32DGX-6XT图片预览
型号: AS4SD2M32DGX-6XT
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×32× 4银行( 64 MB) SDRAM同步 [512K x 32 x 4 Banks (64-Mb) Synchronous SDRAM]
分类和应用: 内存集成电路光电二极管动态存储器
文件页数/大小: 52 页 / 1943 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
 浏览型号AS4SD2M32DGX-6XT的Datasheet PDF文件第16页浏览型号AS4SD2M32DGX-6XT的Datasheet PDF文件第17页浏览型号AS4SD2M32DGX-6XT的Datasheet PDF文件第18页浏览型号AS4SD2M32DGX-6XT的Datasheet PDF文件第19页浏览型号AS4SD2M32DGX-6XT的Datasheet PDF文件第21页浏览型号AS4SD2M32DGX-6XT的Datasheet PDF文件第22页浏览型号AS4SD2M32DGX-6XT的Datasheet PDF文件第23页浏览型号AS4SD2M32DGX-6XT的Datasheet PDF文件第24页  
SDRAM  
AS4SD2M32  
Austin Semiconductor, Inc.  
READ with Auto Precharge  
CONCURRENTAUTOPRECHARGE  
1. Interrupted by a READ (with or without auto precharge); A  
READ to bank m will interrupt a READ on bank n, CAS latency  
later. The PRECHARGE to bank n will begin when the READ to  
bank m is registered (Figure 24).  
2. Interrupted by a WRITE (with or without auto precharge): A  
WRITE to bank m will interrupt a READ on bank n when  
registered. DQM should be used two clocks prior to the WRITE  
command to prevent bus contention. The PRECHARGE to  
bank n will begin when the WRITE to bank m is registered  
(Figure 25).  
An access command (READ or WRITE) to another bank  
while an access command with auto precharge enabled is  
executing is not allowed by SDRAMs, unless the SDRAM  
supports CONCURRENT AUTO PRECHARGE. ASI SDRAMs  
support CONCURRENT AUTO PRECHARGE. Four cases  
where CONCURRENT AUTO PRECHARGE occurs are defined  
below.  
FIGURE 24: READ With Auto Precharge Interrupted by a READ  
FIGURE 25: READ With Auto Precharge Interrupted by a WRITE  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS4SD2M32  
Rev. 1.0 1/08  
20  
 复制成功!