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AS4SD2M32DGX-6XT 参数 Datasheet PDF下载

AS4SD2M32DGX-6XT图片预览
型号: AS4SD2M32DGX-6XT
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×32× 4银行( 64 MB) SDRAM同步 [512K x 32 x 4 Banks (64-Mb) Synchronous SDRAM]
分类和应用: 内存集成电路光电二极管动态存储器
文件页数/大小: 52 页 / 1943 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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SDRAM  
AS4SD2M32  
Austin Semiconductor, Inc.  
clock edge coincident with, the PRECHARGE command. An  
example is shown in Figure 18. Data n+1 is either the last of a  
burst of two or the last desired of a longer burst. Following the  
PRECHARGE command, a subsequent command to the same  
bank cannot be issued until tRP is met. The precharge can be  
issued coincident with the first coincident clock edge (T2 in  
Figure 18) on an A1 Version and with the second clock on an  
A2 Version (Figure 18).  
In the case of a fixed-length burst being executed to  
completion, a PRECHARGE command issued at the optimum  
time (as described above) provides the same operation that  
would result from the same fixed-length burst with auto  
precharge. The disadvantage of the PRECHARGE command is  
that is requires that the command and address buses be  
available at the appropriate time to issue the command; the  
advantage of the PRECHARGE command is that it can be used  
to truncate fixed-length or full-page bursts.  
Data for any WRITE burst may be truncated with a  
subsequent READ command, and data for a fixed-length WRITE  
burst may be immediately followed by a READ command. Once  
the READ command is registered, the data inputs will be  
ignored, and WRITEs will not be executed. An example is shown  
in Figure 17. Data n+1 is either the last of a burst of two or the  
last desired of a longer burst.  
Data for a fixed-length WRITE burst may be followed by,  
or truncated with, a PRECHARGE command to the same bank  
(provided that auto precharge was not activated), and a full-  
page WRITE burst may be truncated with a PRECHARGE com-  
mand to the same bank. The PRECHARGE command should be  
issued tWR after the clock edge at which the last desired input  
data element is registered. The auto precharge mode requires a  
tWR of at least one clock plus time, regardless of frequency. In  
addition, when truncating a WRITE burst, the DQM signal must  
be used to mask input data for the clock edge prior to, and the  
FIGURE 16: Random WRITE Cycles  
FIGURE 18: WRITE to PRECHARGE  
FIGURE 17: WRITE to READ  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS4SD2M32  
Rev. 1.0 1/08  
17  
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