AS4LC1M16 883C
1 MEG x 16 DRAM
AUSTIN SEMICONDUCTOR, INC.
PRELIMINARY
TRUTH TABLE
ADDRESSES
t
t
FUNCTION
RAS
H
CASL CASH WE
OE
X
R
C
DQs
NOTES
Standby
H>X H>X
X
H
H
X
X
High-Z
Data-Out
READ: WORD
READ: LOWER BYTE
L
L
L
L
L
ROW COL
ROW COL
L
H
L
Lower Byte,
Upper Byte, Data-Out
READ: UPPER BYTE
L
L
L
L
H
L
L
L
H
L
L
H
L
L
L
L
X
X
X
ROW COL Lower Byte, Data-Out
Upper Byte
WRITE: WORD
(EARLY WRITE)
ROW COL
ROW COL
ROW COL
Data-In
WRITE: LOWER
BYTE (EARLY)
L
Lower Byte, Data-In
Upper Byte, High-Z
WRITE: UPPER
BYTE (EARLY)
H
Lower Byte, High-Z
Upper Byte, Data-In
READ WRITE
L
L
H>L L>H ROW COL
Data-Out, Data-In
Data-Out
1, 2
2
EDO-PAGE-MODE 1st Cycle
L
H>L H>L
H>L H>L
L>H L>H
H>L H>L
H>L H>L
H
H
H
L
L
L
ROW COL
READ
2nd Cycle
Any Cycle
L
n/a
n/a
COL
n/a
Data-Out
2
L
L
Data-Out
2
EDO-PAGE-MODE 1st Cycle
WRITE 2nd Cycle
EDO-PAGE-MODE 1st Cycle
L
X
X
ROW COL
n/a COL
Data-In
1
L
L
Data-In
1
L
L
H>L H>L H>L L>H ROW COL
H>L H>L H>L L>H n/a COL
Data-Out, Data-In
Data-Out, Data-In
Data-Out
1, 2
1, 2
2
READ-WRITE
HIDDEN
2nd Cycle
READ
L>H>L
L>H>L
L
L
L
L
L
H
L
L
X
X
X
ROW COL
ROW COL
REFRESH
WRITE
Data-In
1, 3
RAS-ONLY REFRESH
CBR REFRESH
H
L
H
L
X
H
ROW
X
n/a
X
High-Z
H>L
High-Z
4
NOTE: 1. These WRITE cycles may also be BYTE WRITE cycles (either CASL or CASH active).
2. These READ cycles may also be BYTE READ cycles (either CASL or CASH active).
3. EARLY WRITE only.
4. Only one CAS must be active (CASL or CASH).
AS4LC1M16
REV. 3/97
DS000020
Austin Semiconductor, Inc., reserves the right to change products or specifications without notice.
2-98
AUSTIN [ AUSTIN SEMICONDUCTOR ]
