iPEM
2.1 Gb SDRAM-DDR2
Austin Semiconductor, Inc.
AS4DDR232M64PBG
FIGURE 9 - EXTENDED MODE REGISTER 3 (EMR3) DEFINITION
BA1 BA0 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Address Bus
Extended Mode
15 14 13 12 11 10
EMR3
9
8
7
6
5
4
3
2
1
0
Register (Ex)
01 01 01 01 01 01 01 01 01 01 01 01 01 01
Mode Register Definition
Mode Register (MR)
M15 M14
0
1
0
1
0
0
1
1
Extended Mode Register (EMR)
Extended Mode Register (EMR2)
Extended Mode Register (EMR3)
Note: 1. E13 (A13)-E0 (A0) are reserved for future use and must be programmed to
"0." A13 is not used in this device.
EXTENDED MODE REGISTER 2
The extended mode register 2 (EMR2) controls functions
beyond those controlled by the mode register. ꢁurrently all
bits in EMR2 are reserved, as shown in Figure 8. The EMR2
is programmed via the LM command and will retain the stored
information until it is programmed again or the device loses
power. Reprogramming the EMR will not alter the contents
of the memory array, provided it is performed correctly.
EMR3 must be loaded when all banks are idle and no bursts
are in progress, and the controller must wait the specifi ed
time tMRD before initiating any subsequent operation.
Violating either of these requirements could result in
unspecified operation.
COMMAND TRUTH TABLES
The following tables provide a quick reference of DDR2
SDRAM available commands, including ꢁKE power-down
modes, and bank-to-bank commands.
EMR2 must be loaded when all banks are idle and no bursts
are in progress, and the controller must wait the specified
time tMRD before initiating any subsequent operation.
Violating either of these requirements could result in
unspecified operation.
EXTENDED MODE REGISTER 3
The extended mode register 3 (EMR3) controls functions
beyond those controlled by the mode register. ꢁurrently, all
bits in EMR3 are reserved, as shown in Figure 9. The EMR3
is programmed via the LM command and will retain the stored
information until it is programmed again or the device loses
power. Reprogramming the EMR will not alter the contents
of the memory array, provided it is performed correctly.
Austin Semiconductor, Inc.
● Austin, Texas ● 512.339.1188 ● www.austinsemiconductor.com
AS4DDR232M64PBG
Rev. 1.3 6/09
14