欢迎访问ic37.com |
会员登录 免费注册
发布采购

AS29LV016JTRGR-55/IT 参数 Datasheet PDF下载

AS29LV016JTRGR-55/IT图片预览
型号: AS29LV016JTRGR-55/IT
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位( 2M ×8位/ 1M ×16位) CMOS 3.0伏只引导扇区闪存 [16 Megabit (2M x 8-Bit / 1M x 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory]
分类和应用: 闪存内存集成电路光电二极管
文件页数/大小: 40 页 / 408 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
 浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第21页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第22页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第23页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第24页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第26页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第27页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第28页浏览型号AS29LV016JTRGR-55/IT的Datasheet PDF文件第29页  
COTS PEM  
BOOT SECTOR FLASH  
Austin Semiconductor, Inc.  
AS29LV016J  
DQ5: EXCEEDED TIMING LIMITS  
After the sector erase command sequence is written, the  
system should read the status on DQ7 (Data# Polling) or  
DQ6 (Toggle Bit I) to ensure the device has accepted the  
command sequence, and then read DQ3. If DQ3 is 1, the  
internally controlled erase cycle has begun; all further  
commands (other than Erase Suspend) are ignored until  
the erase operation is complete. If DQ3 is 0, the device  
will accept additional sector erase commands. To ensure  
the command has been accepted, the system software  
should check the status of DQ3 prior to and following  
each subsequent sector erase command. If DQ3 is high  
on the second status check, the last command might  
not have been accepted. Table 10 shows the outputs for  
DQ3.  
DQ5 indicates whether the program or erase time has  
exceeded a specified internal pulse count limit. Under  
these conditions DQ5 produces a 1. This is a failure  
condition that indicates the program or erase cycle was  
not successfully completed.  
The DQ5 failure condition may appear if the system tries  
to program a 1 to a location that is previously programmed  
to 0. Only an erase operation can change a 0 back  
to a 1. Under this condition, the device halts the operation,  
and when the operation has exceeded the timing limits,  
DQ5 produces a 1.  
Under both these conditions, the system must issue the  
reset command to return the device to reading array data.  
DQ3: SECTOR ERASE TIMER  
After writing a sector erase command sequence, the  
system may read DQ3 to determine whether or not an  
erase operation has begun. (The sector erase timer does  
not apply to the chip erase command.) If additional sectors  
are selected for erasure, the entire time-out also applies  
after each additional sector erase command. When the  
time-out is complete, DQ3 switches from 0 to 1. The  
system may ignore DQ3 if the system can guarantee  
that the time between additional sector erase commands  
will always be less than 50 µs. See also the Sector Erase  
Command Sequence section on page 19.  
Table 10: Write Operation Status  
DQ72  
DQ11  
DQ22  
No Toggle  
Toggle  
Operation  
DQ6  
DQ3  
N/A  
1
RY/BY#  
Standard Embedded Program Algorithm  
Mode Embedded Erase Algorithm  
Reading within Erase  
DQ7#  
0
Toggle  
Toggle  
0
0
0
0
1
No Toggle  
0
N/A  
Toggle  
1
Erase  
Suspend  
Mode  
Suspended Sector  
Reading within Non-Erase  
Suspended Sector  
Data  
Data  
Data  
0
Data  
N/A  
Data  
N/A  
1
0
Erase-Suspend-Program  
DQ7#  
Toggle  
Notes:  
1. DQꢀ switches to 1 when and Embedded Program or Embedded Erase operation has exceeded the maximum  
timing limits. See DQꢀ: Exceeded Timing Limits for more information.  
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection  
for further details.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS29LV016J  
Rev. 0.0 02/09  
25  
 复制成功!