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AS29LV016JTRGR-55/IT 参数 Datasheet PDF下载

AS29LV016JTRGR-55/IT图片预览
型号: AS29LV016JTRGR-55/IT
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位( 2M ×8位/ 1M ×16位) CMOS 3.0伏只引导扇区闪存 [16 Megabit (2M x 8-Bit / 1M x 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory]
分类和应用: 闪存内存集成电路光电二极管
文件页数/大小: 40 页 / 408 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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COTS PEM  
BOOT SECTOR FLASH  
Austin Semiconductor, Inc.  
AS29LV016J  
If a program address falls within a protected sector, DQ6  
toggles for approximately 1 µs after the program command  
sequence is written, then returns to reading array data.  
RY/BY#: READY/BUSY#  
The RY/BY# is a dedicated, open-drain output pin that  
indicates whether an EmbeddedAlgorithm is in progress  
or complete. The RY/BY# status is valid after the rising  
edge of the final WE# pulse in the command sequence.  
Since RY/BY# is an open-drain output, several RY/BY#  
pins can be tied together in parallel with a pull-up resistor  
to VCC.  
DQ6 also toggles during the erase-suspend-program  
mode, and stops toggling once the Embedded Program  
algorithm is complete.  
Table 10 on page 25 shows the outputs for Toggle Bit I  
on DQ6. Figure 6, on page 24 shows the toggle bit  
algorithm in flowchart form, and Reading Toggle Bits DQ6/  
DQ2 on page 24 explains the algorithm. Figure 19, on  
page 34 shows the toggle bit timing diagrams. Figure  
20, on page 5 shows the differences between DQ2 and  
DQ6 in graphical form. See also the subsection on DQ2:  
Toggle Bit II below.  
If the output is low (Busy), the device is actively erasing  
or programming. (This includes programming in the Erase  
Suspend mode.) If the output is high (Ready), the device  
is ready to read array data (including during the Erase  
Suspend mode), or is in the standby mode.  
Table 10 on page 25 shows the outputs for RY/BY#.  
Figures: Figure 12, on page 29, Figure 13, on page 30,  
Figure 16, on page 33 and Figure 17, on page 33 shows  
RY/BY# for read, reset, program, and erase operations,  
respectively.  
DQ2: TOGGLE BIT II  
The “Toggle Bit II” on DQ2, when used with DQ6, indicates  
whether a particular sector is actively erasing (that is,  
the Embedded Erase algorithm is in progress), or whether  
that sector is erase-suspended. Toggle Bit II is valid after  
the rising edge of the final WE# pulse in the command  
sequence.  
DQ6: TOGGLE BIT I  
Toggle Bit I on DQ6 indicates whether an Embedded  
Program or Erase algorithm is in progress or complete,  
or whether the device has entered the Erase Suspend  
mode. Toggle Bit I may be read at any address, and is  
valid after the rising edge of the final WE# pulse in the  
command sequence (prior to the program or erase  
operation), and during the sector erase time-out.  
DQ2 toggles when the system reads at addresses within  
those sectors that have been selected for erasure. (The  
system may use either OE# or CE# to control the read  
cycles.) But DQ2 cannot distinguish whether the sector  
is actively erasing or is erase-suspended. DQ6, by  
comparison, indicates whether the device is actively  
erasing, or is in Erase Suspend, but cannot distinguish  
which sectors are selected for erasure. Thus, both status  
bits are required for sector and mode information. Refer  
to Table 10 on page 25 to compare outputs for DQ2 and  
DQ6.  
During an Embedded Program or Erase algorithm  
operation, successive read cycles to any address cause  
DQ6 to toggle. (The system may use either OE# or CE#  
to control the read cycles.) When the operation is  
complete, DQ6 stops toggling.  
After an erase command sequence is written, if all sectors  
selected for erasing are protected, DQ6 toggles for  
approximately 100 µs, then returns to reading array data.  
If not all selected sectors are protected, the Embedded  
Erase algorithm erases the unprotected sectors, and  
ignores the selected sectors that are protected.  
Figure 6, on page 24 shows the toggle bit algorithm in  
flowchart form, and the section Reading Toggle Bits DQ6/  
DQ2 on page 24 explains the algorithm. See also the  
DQ6: Toggle Bit I subsection. Figure 19, on page 34 shows  
the toggle bit timing diagram. Figure 20, on page 35 shows  
the differences between DQ2 and DQ6 in graphical form.  
The system can use DQ6 and DQ2 together to determine  
whether a sector is actively erasing or is erase-suspended.  
When the device is actively erasing (that is, the Embedded  
Erase algorithm is in progress), DQ6 toggles. When the  
device enters the Erase Suspend mode, DQ6 stops  
toggling. However, the system must also use DQ2 to  
determine which sectors are erasing or erase-suspended.  
Alternatively, the system can use DQ7 (see the  
subsection on DQ7: Data# Polling on page 22).  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS29LV016J  
Rev. 0.0 02/09  
23  
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