COTS PEM
BOOT SECTOR FLASH
Austin Semiconductor, Inc.
AS29LV016J
WRITE OPERATION STATUS
When the system detects DQ7 has changed from the
complement to true data, it can read valid data at DQ7–
DQ0 on the following read cycles. This is because DQ7
may change asynchronously with DQ0–DQ6 while Output
Enable (OE#) is asserted low. Figure 18, on page 34,
illustrates this.
The device provides several bits to determine the status
of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and
RY/BY#. Table 10 on page 25 and the following
subsections describe the functions of these bits. DQ7,
RY/BY#, and DQ6 each offer a method for determining
whether a program or erase operation is complete or in
progress. These three bits are discussed first.
Table 10 on page 25 shows the outputs for Data# Polling
on DQ7. Figure 5 below shows the Data# Polling
algorithm.
DQ7: DATA# POLLING
The Data# Polling bit, DQ7, indicates to the host system
whether an Embedded Algorithm is in progress or
completed, or whether the device is in Erase Suspend.
Data# Polling is valid after the rising edge of the final
WE# pulse in the program or erase command sequence.
START
Read DQ7–DQ0
Addr = VA
During the Embedded Program algorithm, the device
outputs on DQ7 the complement of the datum
programmed to DQ7. This DQ7 status also applies to
programming during Erase Suspend. When the Embedded
Program algorithm is complete, the device outputs the
datum programmed to DQ7. The system must provide
the program address to read valid status information on
DQ7. If a program address falls within a protected sector,
Data# Polling on DQ7 is active for approximately 1 µs,
then the device returns to reading array data.
Yes
DQ7 = Data?
No
No
DQ5 = 1?
During the Embedded Erase algorithm, Data# Polling
produces a 0 on DQ7. When the Embedded Erase
algorithm is complete, or if the device enters the Erase
Suspend mode, Data# Polling produces a 1 on DQ7. This
is analogous to the complement/true datum output
described for the Embedded Program algorithm: the erase
function changes all the bits in a sector to 1; prior to this,
the device outputs the complement, or 0. The system
must provide an address within any of the sectors selected
for erasure to read valid status information on DQ7.
Yes
Read DQ7–DQ0
Addr = VA
Yes
DQ7 = Data?
No
After an erase command sequence is written, if all sectors
selected for erasing are protected, Data# Polling on DQ7
is active for approximately 100 µs, then the device returns
to reading array data. If not all selected sectors are
protected, the Embedded Erase algorithm erases the
unprotected sectors, and ignores the selected sectors
that are protected.
PASS
FAIL
Notes:
1. VA = Valid address for programming. During a sector
erase operation, a valid address is an address within
any sector selected for erasure. During chip erase, a
valid address is any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = 1 because
DQ7 may change simultaneously with DQ5.
Figure 5. Data# Polling Algorithm
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS29LV016J
Rev. 0.0 02/09
22
AUSTIN [ AUSTIN SEMICONDUCTOR ]
