ATmega64A
Figure 10-2. MCU Start-up, RESET Tied to VCC
VPOT
VCC
VRST
RESET
tTOUT
TIME-OUT
INTERNAL
RESET
Figure 10-3. MCU Start-up, RESET Extended Externally
VPOT
VCC
VRST
RESET
tTOUT
TIME-OUT
INTERNAL
RESET
10.0.4
External Reset
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see Table 28-3) will generate a reset, even if the clock is not running.
Shorter pulses are not guaranteed to generate a reset. When the applied signal reaches the
Reset Threshold Voltage – VRST on its positive edge, the delay counter starts the MCU after the
Time-out period tTOUT has expired.
Figure 10-4. External Reset during Operation
CC
53
8160C–AVR–07/09
ATMEL [ ATMEL ]
