ATmega64A
Table 10-1. WDT Configuration as a Function of the Fuse Settings of M103C and WDTON
Safety
Level
WDT Initial
State
How to Disable
the WDT
How to Change
Time-out
M103C
WDTON
Unprogrammed
Unprogrammed
1
Disabled
Timed
Timed sequence
sequence
Unprogrammed
Programmed
Programmed
2
0
Enabled
Disabled
Always enabled
Timed sequence
No restriction
Unprogrammed
Timed
sequence
Programmed
Programmed
2
Enabled
Always enabled
Timed sequence
Figure 10-7. Watchdog Timer
WATCHDOG
OSCILLATOR
10.3 Timed Sequences for Changing the Configuration of the Watchdog Timer
The sequence for changing configuration differs slightly between the three safety levels. Sepa-
rate procedures are described for each level.
10.3.1
10.3.2
Safety Level 0
Safety Level 1
This mode is compatible with the Watchdog operation found in ATmega103. The Watchdog
Timer is initially disabled, but can be enabled by writing the WDE bit to 1 without any restriction.
The Time-out period can be changed at any time without restriction. To disable an enabled
Watchdog Timer, the procedure described on page 57 (WDE bit description) must be followed.
In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the WDE bit
to 1 without any restriction. A timed sequence is needed when changing the Watchdog Time-out
period or disabling an enabled Watchdog Timer. To disable an enabled Watchdog Timer, and/or
changing the Watchdog Time-out, the following procedure must be followed:
1. In the same operation, write a logic one to WDCE and WDE. A logic one must be written
to WDE regardless of the previous value of the WDE bit.
2. Within the next four clock cycles, in the same operation, write the WDE and WDP bits as
desired, but with the WDCE bit cleared.
56
8160C–AVR–07/09
ATMEL [ ATMEL ]
