Table 46 shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast
PWM mode.
Table 46. Compare Output Mode, Fast PWM Mode(1)
COM0A1
COM0A0
Description
0
0
0
1
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
1
1
0
1
Clear OC0A on Compare Match, set OC0A at TOP
Set OC0A on Compare Match, clear OC0A at TOP
Note:
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case,
the Compare Match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 91 for more details.
Table 47 shows the COM0A1:0 bit functionality when the WGM02:0 bits are set to
phase correct PWM mode.
Table 47. Compare Output Mode, Phase Correct PWM Mode(1)
COM0A1
COM0A0
Description
0
0
0
1
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
1
1
0
1
Clear OC0A on Compare Match when up-counting. Set OC0A on
Compare Match when down-counting.
Set OC0A on Compare Match when up-counting. Clear OC0A on
Compare Match when down-counting.
Note:
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case,
the Compare Match is ignored, but the set or clear is done at TOP. See “Phase Cor-
rect PWM Mode” on page 119 for more details.
• Bits 5:4 – COM0B1:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC0B) behavior. If one or both of the
COM0B1:0 bits are set, the OC0B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit cor-
responding to the OC0B pin must be set in order to enable the output driver.
When OC0B is connected to the pin, the function of the COM0B1:0 bits depends on the
WGM02:0 bit setting. Table 48 shows the COM0B1:0 bit functionality when the
WGM02:0 bits are set to a normal or CTC mode (non-PWM).
Table 48. Compare Output Mode, non-PWM Mode
COM0B1
COM0B0
Description
0
0
1
1
0
1
0
1
Normal port operation, OC0B disconnected.
Toggle OC0B on Compare Match
Clear OC0B on Compare Match
Set OC0B on Compare Match
96
ATmega48/88/168
2545D–AVR–07/04
ATMEL [ ATMEL ]
