Table 34. Overriding Signals for Alternate Functions in PB7..PB4
Signal
Name
PB7/XTAL2/
PB6/XTAL1/
PB5/SCK/
PCINT5
PB4/MISO/
PCINT4
TOSC2/PCINT7(1)
TOSC1/PCINT6(1)
PUOE
INTRC • EXTCK+
AS2
INTRC + AS2
SPE • MSTR
SPE • MSTR
PUOV
DDOE
0
0
PORTB5 • PUD
SPE • MSTR
PORTB4 • PUD
SPE • MSTR
INTRC • EXTCK+
AS2
INTRC + AS2
DDOV
PVOE
PVOV
0
0
0
0
0
0
0
0
SPE • MSTR
SCK OUTPUT
SPE • MSTR
SPI SLAVE
OUTPUT
DIEOE
INTRC • EXTCK +
AS2 + PCINT7 •
PCIE0
INTRC + AS2 +
PCINT6 • PCIE0
PCINT5 • PCIE0
1
PCINT4 • PCIE0
DIEOV
DI
(INTRC + EXTCK)
• AS2
INTRC • AS2
1
PCINT7 INPUT
PCINT6 INPUT
PCINT5 INPUT
SCK INPUT
PCINT4 INPUT
SPI MSTR INPUT
AIO
Oscillator Output
Oscillator/Clock
Input
–
–
Notes: 1. INTRC means that one of the internal RC Oscillators are selected (by the CKSEL
fuses), EXTCK means that external clock is selected (by the CKSEL fuses).
Table 35. Overriding Signals for Alternate Functions in PB3..PB0
Signal
Name
PB3/MOSI/
OC2/PCINT3
PB2/SS/
OC1B/PCINT2
PB1/OC1A/
PCINT1
PB0/ICP1/
PCINT0
PUOE
PUOV
DDOE
DDOV
PVOE
SPE • MSTR
PORTB3 • PUD
SPE • MSTR
0
SPE • MSTR
PORTB2 • PUD
SPE • MSTR
0
0
0
0
0
0
0
0
0
0
SPE • MSTR +
OC2A ENABLE
OC1B ENABLE
OC1A ENABLE
PVOV
SPI MSTR
OC1B
OC1A
0
OUTPUT + OC2A
DIEOE
DIEOV
DI
PCINT3 • PCIE0
1
PCINT2 • PCIE0
1
PCINT1 • PCIE0
1
PCINT0 • PCIE0
1
PCINT3 INPUT
PCINT2 INPUT
SPI SS
PCINT1 INPUT
PCINT0 INPUT
ICP1 INPUT
SPI SLAVE
INPUT
AIO
–
–
–
–
72
ATmega48/88/168
2545D–AVR–07/04
ATMEL [ ATMEL ]
