Figure 120. Addressing the Flash Which is Organized in Pages(1)
PCMSB
PAGEMSB
PROGRAM
COUNTER
PCPAGE
PCWORD
PAGE ADDRESS
WITHIN THE FLASH
WORD ADDRESS
WITHIN A PAGE
PROGRAM MEMORY
PAGE
PAGE
INSTRUCTION WORD
PCWORD[PAGEMSB:0]:
00
01
02
PAGEEND
Note:
1. PCPAGE and PCWORD are listed in Table 122 on page 274.
Figure 121. Programming the Flash Waveforms(1)
F
A
B
C
D
E
B
C
D
E
G
H
0x10
ADDR. LOW
DATA LOW
DATA HIGH
ADDR. LOW DATA LOW
DATA HIGH
ADDR. HIGH
XX
XX
XX
DATA
XA1
XA0
BS1
XTAL1
WR
RDY/BSY
RESET +12V
OE
PAGEL
BS2
Note:
1. “XX” is don’t care. The letters refer to the programming description above.
Programming the EEPROM
The EEPROM is organized in pages, see Table 123 on page 274. When programming
the EEPROM, the program data is latched into a page buffer. This allows one page of
data to be programmed simultaneously. The programming algorithm for the EEPROM
data memory is as follows (refer to “Programming the Flash” on page 278 for details on
Command, Address and Data loading):
1. A: Load Command “0001 0001”.
2. G: Load Address High Byte (0x00 - 0xFF).
3. B: Load Address Low Byte (0x00 - 0xFF).
4. C: Load Data (0x00 - 0xFF).
5. E: Latch data (give PAGEL a positive pulse).
280
ATmega48/88/168
2545D–AVR–07/04
ATMEL [ ATMEL ]
