Bypass Register
The Bypass Register consists of a single Shift Register stage. When the Bypass Regis-
ter is selected as path between TDI and TDO, the register is reset to 0 when leaving the
Capture-DR controller state. The Bypass Register can be used to shorten the scan
chain on a system when the other devices are to be tested.
Device Identification Register Figure 114 shows the structure of the Device Identification Register.
Figure 114. The Format of the Device Identification Register
MSB
LSB
0
Bit
31
28
27
12
11
1
Device ID
Version
Part Number
Manufacturer ID
1
4 bits
16 bits
11 bits
1 bit
Version
Version is a 4-bit number identifying the revision of the component. The JTAG version
number follows the revision of the device. Revision A is 0x0, revision B is x1 and so on.
Part Number
The part number is a 16-bit code identifying the component. The JTAG Part Number for
ATmega32 is listed in Table 87.
Table 87. AVR JTAG Part Number
Part Number
JTAG Part Number (Hex)
ATmega32
0x9502
Manufacturer ID
The Manufacturer ID is a 11 bit code identifying the manufacturer. The JTAG manufac-
turer ID for ATMEL is listed in Table 88.
Table 88. Manufacturer ID
Manufacturer
JTAG Man. ID (Hex)
ATMEL
0x01F
Reset Register
The Reset Register is a Test Data Register used to reset the part. Since the AVR tri-
states Port Pins when reset, the Reset Register can also replace the function of the
unimplemented optional JTAG instruction HIGHZ.
A high value in the Reset Register corresponds to pulling the External Reset low. The
part is reset as long as there is a high value present in the Reset Register. Depending
on the Fuse settings for the clock options, the part will remain reset for a Reset Time-
Out Period (refer to “Clock Sources” on page 25) after releasing the Reset Register. The
output from this Data Register is not latched, so the reset will take place immediately, as
shown in Figure 115.
226
ATmega32(L)
2503J–AVR–10/06
ATMEL [ ATMEL ]
