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ATMEGA16U2-MUR 参数 Datasheet PDF下载

ATMEGA16U2-MUR图片预览
型号: ATMEGA16U2-MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8/16 / 32K Butes [8-bit Microcontroller with 8/16/32K Butes of ISP Flash]
分类和应用: 微控制器异步传输模式PCATM
文件页数/大小: 310 页 / 4432 K
品牌: ATMEL [ ATMEL ]
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ATmega8U2/16U2/32U2  
Assembly Code Example  
sei ; set Global Interrupt Enable  
sleep; enter sleep, waiting for interrupt  
; note: will enter sleep before any pending  
; interrupt(s)  
C Code Example  
__enable_interrupt(); /* set Global Interrupt Enable */  
__sleep(); /* enter sleep, waiting for interrupt */  
/* note: will enter sleep before any pending interrupt(s) */  
6.8.1  
Interrupt Response Time  
The interrupt execution response for all the enabled AVR interrupts is five clock cycles minimum.  
After five clock cycles the program vector address for the actual interrupt handling routine is exe-  
cuted. During these five clock cycle period, the Program Counter is pushed onto the Stack. The  
vector is normally a jump to the interrupt routine, and this jump takes three clock cycles. If an  
interrupt occurs during execution of a multi-cycle instruction, this instruction is completed before  
the interrupt is served. If an interrupt occurs when the MCU is in sleep mode, the interrupt exe-  
cution response time is increased by five clock cycles. This increase comes in addition to the  
start-up time from the selected sleep mode.  
A return from an interrupt handling routine takes five clock cycles. During these five clock cycles,  
the Program Counter (three bytes) is popped back from the Stack, the Stack Pointer is incre-  
mented by three, and the I-bit in SREG is set.  
15  
7799D–AVR–11/10  
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