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ATMEGA16U2-MUR 参数 Datasheet PDF下载

ATMEGA16U2-MUR图片预览
型号: ATMEGA16U2-MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8/16 / 32K Butes [8-bit Microcontroller with 8/16/32K Butes of ISP Flash]
分类和应用: 微控制器异步传输模式PCATM
文件页数/大小: 310 页 / 4432 K
品牌: ATMEL [ ATMEL ]
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ATmega8U2/16U2/32U2  
Figure 6-3. The X-, Y-, and Z-registers  
15  
XH  
XL  
0
0
X-register  
7
0
0
7
R27 (0x1B)  
R26 (0x1A)  
15  
YH  
YL  
ZL  
0
0
Y-register  
Z-register  
7
7
R29 (0x1D)  
R28 (0x1C)  
15  
ZH  
0
0
7
7
0
R31 (0x1F)  
R30 (0x1E)  
In the different addressing modes these address registers have functions as fixed displacement,  
automatic increment, and automatic decrement (see the instruction set reference for details).  
6.6  
Stack Pointer  
The Stack is mainly used for storing temporary data, for storing local variables and for storing  
return addresses after interrupts and subroutine calls. Note that the Stack is implemented as  
growing from higher to lower memory locations. The Stack Pointer Register always points to the  
top of the Stack. The Stack Pointer points to the data SRAM Stack area where the Subroutine  
and Interrupt Stacks are located. A Stack PUSH command will decrease the Stack Pointer.  
The Stack in the data SRAM must be defined by the program before any subroutine calls are  
executed or interrupts are enabled. Initial Stack Pointer value equals the last address of the  
internal SRAM and the Stack Pointer must be set to point above start of the SRAM, see Figure  
7-2 on page 18.  
See Table 6-1 for Stack Pointer details.  
Table 6-1.  
Stack Pointer instructions  
Instruction Stack pointer  
Description  
Decremented by 1 Data is pushed onto the stack  
Return address is pushed onto the stack with a subroutine call or  
PUSH  
CALL  
ICALL  
RCALL  
Decremented by 2 interrupt  
POP  
Incremented by 1  
Incremented by 2  
Data is popped from the stack  
RET  
RETI  
Return address is popped from the stack with return from  
subroutine or return from interrupt  
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of  
bits actually used is implementation dependent. Note that the data space in some implementa-  
tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register  
will not be present.  
11  
7799D–AVR–11/10  
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