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ATMEGA169PV 参数 Datasheet PDF下载

ATMEGA169PV图片预览
型号: ATMEGA169PV
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有16K字节的系统内可编程闪存 [Microcontroller with 16K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 390 页 / 3485 K
品牌: ATMEL [ ATMEL ]
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Figure 16-2. Counter Unit Block Diagram  
TOVn  
(Int.Req.)  
DATA BUS  
TOSC1  
TOSC2  
count  
clear  
T/C  
Oscillator  
clk Tn  
TCNTn  
Control Logic  
Prescaler  
direction  
clk  
bottom  
top  
I/O  
Signal description (internal signals):  
count  
direction  
clear  
Increment or decrement TCNT2 by 1.  
Selects between increment and decrement.  
Clear TCNT2 (set all bits to zero).  
Timer/Counter clock.  
clkT2  
top  
Signalizes that TCNT2 has reached maximum value.  
Signalizes that TCNT2 has reached minimum value (zero).  
bottom  
Depending on the mode of operation used, the counter is cleared, incremented, or decremented  
at each timer clock (clkT2). clkT2 can be generated from an external or internal clock source,  
selected by the Clock Select bits (CS22:0). When no clock source is selected (CS22:0 = 0) the  
timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of  
whether clkT2 is present or not. A CPU write overrides (has priority over) all counter clear or  
count operations.  
The counting sequence is determined by the setting of the WGM21 and WGM20 bits located in  
the Timer/Counter Control Register (TCCR2A). There are close connections between how the  
counter behaves (counts) and how waveforms are generated on the Output Compare output  
OC2A. For more details about advanced counting sequences and waveform generation, see  
”Modes of Operation” on page 143.  
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation selected by  
the WGM21:0 bits. TOV2 can be used for generating a CPU interrupt.  
16.4 Output Compare Unit  
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register  
(OCR2A). Whenever TCNT2 equals OCR2A, the comparator signals a match. A match will set  
the Output Compare Flag (OCF2A) at the next timer clock cycle. If enabled (OCIE2A = 1), the  
Output Compare Flag generates an Output Compare interrupt. The OCF2A Flag is automatically  
cleared when the interrupt is executed. Alternatively, the OCF2A Flag can be cleared by soft-  
ware by writing a logical one to its I/O bit location. The Waveform Generator uses the match  
signal to generate an output according to operating mode set by the WGM21:0 bits and Com-  
pare Output mode (COM2A1:0) bits. The max and bottom signals are used by the Waveform  
Generator for handling the special cases of the extreme values in some modes of operation  
(”Modes of Operation” on page 143).  
Figure 16-3 shows a block diagram of the Output Compare unit.  
140  
ATmega169P  
8018A–AVR–03/06  
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