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ATMEGA2560-16AU-SL383 参数 Datasheet PDF下载

ATMEGA2560-16AU-SL383图片预览
型号: ATMEGA2560-16AU-SL383
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PQFP100, 14 X 14 MM, 1 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, MS-026AED, TQFP-100]
分类和应用: 时钟微控制器
文件页数/大小: 448 页 / 7518 K
品牌: ATMEL [ ATMEL ]
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20.10 Register Description  
20.10.1 TCCR2A –Timer/Counter Control Register A  
Bit  
7
COM2A1  
R/W  
6
COM2A0  
R/W  
5
COM2B1  
R/W  
4
COM2B0  
R/W  
3
2
1
WGM21  
R/W  
0
0
WGM20  
R/W  
0
TCCR2A  
(0xB0)  
Read/Write  
Initial Value  
R
0
R
0
0
0
0
0
• Bits 7:6 – COM2A1:0: Compare Match Output A Mode  
These bits control the Output Compare pin (OC2A) behavior. If one or both of the COM2A1:0  
bits are set, the OC2A output overrides the normal port functionality of the I/O pin it is connected  
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2A pin  
must be set in order to enable the output driver.  
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the  
WGM22:0 bit setting. Table 20-2 shows the COM2A1:0 bit functionality when the WGM22:0 bits  
are set to a normal or CTC mode (non-PWM).  
Table 20-2. Compare Output Mode, non-PWM Mode  
COM2A1  
COM2A0  
Description  
0
0
1
1
0
1
0
1
Normal port operation, OC2A disconnected.  
Toggle OC2A on Compare Match  
Clear OC2A on Compare Match  
Set OC2A on Compare Match  
Table 20-3 shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM  
mode.  
Table 20-3. Compare Output Mode, Fast PWM Mode(1)  
COM2A1  
COM2A0  
Description  
0
0
Normal port operation, OC2A disconnected.  
WGM22 = 0: Normal Port Operation, OC2A Disconnected.  
WGM22 = 1: Toggle OC2A on Compare Match.  
0
1
1
1
0
1
Clear OC2A on Compare Match, set OC2A at BOTTOM,  
(non-inverting mode).  
Set OC2A on Compare Match, clear OC2A at BOTTOM,  
(inverting mode).  
Note:  
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-  
pare Match is ignored, but the set or clear is done at BOTTOM. See “Fast PWM Mode” on  
page 179 for more details.  
Table 20-4 shows the COM2A1:0 bit functionality when the WGM22:0 bits are set to phase cor-  
rect PWM mode.  
188  
ATmega640/1280/1281/2560/2561  
2549L–AVR–08/07  
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