AT90USB64/128
• 1 - ALLOC - Endpoint Allocation Bit
Set this bit to allocate the endpoint memory.
Clear to free the endpoint memory.
See Section 22.7, page 270 for more details.
• 0 - Reserved
The value read from these bits is always 0. Do not set these bits.
Bit
7
6
OVERFI
R/W
0
5
4
3
2
1
0
CFGOK
UNDERFI ZLPSEEN
DTSEQ1:0
NBUSYBK1:0
UESTA0X
Read/Write
Initial Value
R
0
R/W
0
R/W
0
R
0
R
0
R
0
R
0
• 7 - CFGOK - Configuration Status Flag
Set by hardware when the endpoint X size parameter (EPSIZE) and the bank parametrization
(EPBK) are correct compared to the max FIFO capacity and the max number of allowed bank.
This bit is updated when the bit ALLOC is set.
If this bit is cleared, the user should reprogram the UECFG1X register with correct EPSIZE and
EPBK values.
• 6 - OVERFI - Overflow Error Interrupt Flag
Set by hardware when an overflow error occurs in an isochronous endpoint. An interrupt
(EPINTx) is triggered (if enabled).
See Section 22.16, page 278 for more details.
Shall be cleared by software. Setting by software has no effect.
• 5 - UNDERFI - Flow Error Interrupt Flag
Set by hardware when an underflow error occurs in an isochronous endpoint. An interrupt
(EPINTx) is triggered (if enabled).
See Section 22.16, page 278 for more details.
Shall be cleared by software. Setting by software has no effect.
• 4 - ZLPSEEN - Zero Length Packet Seen (bit / Flag)
Set by hardware, as soon as a ZLP has been filtered during a transfer.
Shall be cleared by the software. Setting by software has no effect.
• 3-2 - DTSEQ1:0 - Data Toggle Sequencing Flag
Set by hardware to indicate the PID data of the current bank:
00b Data0
01b Data1
1xb Reserved.
For OUT transfer, this value indicates the last data toggle received on the current bank.
287
7593A–AVR–02/06
ATMEL [ ATMEL ]
