Bit
7
6
5
4
3
2
1
0
FNUM7:0
UDFNUML
Read/Write
Initial Value
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
• Frame Number Lower Flag
Set by hardware. These bits are the 8 LSB of the 11-bits Frame Number information.
Bit
7
6
5
4
FNCERR
R
3
2
1
0
-
-
-
-
-
-
-
UDMFN
Read/W
rite
Initial
Value
0
0
0
0
0
0
0
0
• 7-5 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 4 - FNCERR -Frame Number CRC Error Flag
Set by hardware when a corrupted Frame Number in start of frame packet is received.
This bit and the SOFI interrupt are updated at the same time.
• 3-0 - Reserved
The value read from these bits is always 0. Do not set these bits.
22.19.2 USB device endpoint registers
Bit
7
-
6
-
5
-
4
-
3
-
2
1
EPNUM2:0
R/W
0
UENUM
Read/Write
Initial Value
R
0
R
0
R
0
R
0
R
0
R/W
0
R/W
0
0
• 7-3 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 2-0 - EPNUM2:0 Endpoint Number Bits
Load by software to select the number of the endpoint which shall be accessed by the CPU. See
Section 22.6, page 270 for more details.
EPNUM = 111b is forbidden.
Bit
7
-
6
EPRST6
R/W
5
EPRST5
R/W
4
EPRST4
R/W
3
EPRST3
R/W
2
EPRST2
R/W
1
EPRST1
R/W
0
EPRST0
R/W
UERST
Read/Write
Initial Value
R
0
0
0
0
0
0
0
0
284
AT90USB64/128
7593A–AVR–02/06