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90USB1287-16AU 参数 Datasheet PDF下载

90USB1287-16AU图片预览
型号: 90USB1287-16AU
PDF下载: 下载PDF文件 查看货源
内容描述: 单片机具有ISP功能的Flash和USB控制器64 / 128K字节 [Microcontroller with 64/128K Bytes of ISP Flash and USB Controller]
分类和应用: 微控制器
文件页数/大小: 434 页 / 3172 K
品牌: ATMEL [ ATMEL ]
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AT90USB64/128  
Set by hardware when a new OUT message is stored in the current bank, at the same time than  
RXOUT or RXSTP.  
Clear to free the current bank and to switch to the following bank. Setting by software has no  
effect.  
For IN Endpoint:  
Set by hardware when the current bank is free, at the same time than TXIN.  
Clear to send the FIFO data and to switch the bank. Setting by software has no effect.  
• 6 - NAKINI - NAK IN Received Interrupt Flag  
Set by hardware when a NAK handshake has been sent in response of a IN request from the  
host. This triggers an USB interrupt if NAKINE is sent.  
Shall be cleared by software. Setting by software has no effect.  
• 5 - RWAL - Read/Write Allowed Flag  
Set by hardware to signal:  
- for an IN endpoint: the current bank is not full i.e. the firmware can push data into the FIFO,  
- for an OUT endpoint: the current bank is not empty, i.e. the firmware can read data from the  
FIFO.  
The bit is never set if STALLRQ is set, or in case of error.  
Cleared by hardware otherwise.  
This bit shall not be used for the control endpoint.  
• 4 - NAKOUTI - NAK OUT Received Interrupt Flag  
Set by hardware when a NAK handshake has been sent in response of a OUT/PING request  
from the host. This triggers an USB interrupt if NAKOUTE is sent.  
Shall be cleared by software. Setting by software has no effect.  
• 3 - RXSTPI - Received SETUP Interrupt Flag  
Set by hardware to signal that the current bank contains a new valid SETUP packet. An inter-  
rupt (EPINTx) is triggered (if enabled).  
Shall be cleared by software to handshake the interrupt. Setting by software has no effect.  
This bit is inactive (cleared) if the endpoint is an IN endpoint.  
• 2 - RXOUTI / KILLBK - Received OUT Data Interrupt Flag  
Set by hardware to signal that the current bank contains a new packet. An interrupt (EPINTx) is  
triggered (if enabled).  
Shall be cleared by software to handshake the interrupt. Setting by software has no effect.  
Kill Bank IN Bit  
Set this bit to kill the last written bank.  
Cleared by hardware when the bank is killed. Clearing by software has no effect.  
See page 278 for more details on the Abort.  
289  
7593A–AVR–02/06  
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