Figure 19-9. Master SPI Polling Policy Flows
SPI Initialization
Polling Policy
SPI Transfer
Polling Policy
Disable Interrupt
SPIE = 0
Select Slave
Pn.x = L
Select Master Mode
MSTR = 1
Start Transfer
Write Data in SPDAT
Select Bit Rate
program SPR2:0
End Of Transfer?
SPIF = 1?
Select Format
program CPOL & CPHA
Get Data Received
Read SPDAT
Enable SPI
SPEN = 1
Last Transfer?
Deselect Slave
Pn.x = H
19.3.5
Master Mode with Interrupt Policy
Figure 19-10 shows the initialization phase and the transfer phase flows using the interrupt pol-
icy. Using this flow prevents any overrun error occurrence.
•
•
•
The bit rate is selected according to Table 97.
The transfer format depends on the slave peripheral.
SS may be deasserted between transfers depending also on the slave peripheral.
Reading SPSTA at the beginning of the ISR is mandatory for clearing the SPIF flag. Clear is
effective when reading SPDAT.
126
AT89C5132
4173E–USB–09/07
ATMEL [ ATMEL ]
