19. Synchronous Peripheral Interface
The AT89C5132 implement a Synchronous Peripheral Interface with master and slave modes
capability.
Figure 19-1 shows an SPI bus configuration using the AT89C5132 as master connected to slave
peripherals. Figure 19-2 shows an SPI bus configuration using the AT89C5132 as slave of an
other master.
The bus is made of three wires connecting all the devices together:
•
•
•
Master Output Slave Input (MOSI): it is used to transfer data in series from the master to a
slave. It is driven by the master.
Master Input Slave Output (MISO): it is used to transfer data in series from a slave to the
master. It is driven by the selected slave.
Serial Clock (SCK): it is used to synchronize the data transmission both in and out of the
devices through their MOSI and MISO lines. It is driven by the master for eight clock cycles
which allows to exchange one byte on the serial lines.
Each slave peripheral is selected by one Slave Select pin (SS). If there is only one slave, it may
be continuously selected with SS tied to a low level. Otherwise, the AT89C5132 may select each
device by software through port pins (Pn.x). Special care should be taken not to select two
slaves at the same time to avoid bus conflicts.
Figure 19-1. Typical Master SPI Bus Configuration
Pn.z
Pn.y
Pn.x
LCD
Controller
SS
SS
SS
DataFlash 1
DataFlash 2
AT89C5132
SO
SI
SCK
SO
SI
SCK
SO
SI
SCK
MISO
MOSI
SCK
P4.0
P4.1
P4.2
Figure 19-2. Typical Slave SPI Bus Configuration
SSn
SS1
SS
AT89C5132
Slave n
SS0
SS
SS
SO
Slave 1
Slave 2
SO
SI
SCK
SI
SCK
MISO MOSI SCK
MASTER
MISO
MOSI
SCK
120
AT89C5132
4173E–USB–09/07
ATMEL [ ATMEL ]
