AT85C51SND3Bx
Table 215. NFIEN Register
NFIEN (1.A6h) – Nand Flash Controller Interrupt Enable Register
7
6
5
4
3
2
1
0
-
-
-
SMCTE
ILGLE
ECCRDYE ECCERRE
STOPE
Bit
Bit
Number
Mnemonic Description
Reserved
7-5
4
-
The value read from these bits is always 0. Do not set these bits.
SMC Transition Interrupt Enable Bit
SMCTE
ILGLE
Set to enable the SMCTI interrupt.
Clear to disable the SMCTI interrupt.
Illegal Operation Interrupt Enable Bit
3
2
1
0
Set to enable the ILGLI interrupt.
Clear to disable the ILGLI interrupt.
ECC Ready Interrupt Enable Bit
ECCRDYE
ECCERRE
STOPE
Set to enable the ECCRDYI interrupt.
Clear to disable the ECCRDYI interrupt.
ECC Error Interrupt Enable Bit
Set to enable the ECCERRI interrupt.
Clear to disable the ECCERRI interrupt.
Stop Interrupt Enable Bit
Set to enable the STOPI interrupt.
Clear to disable the STOPI interruption.
Reset Value = 0000 0000b
Table 216. NFUDAT Register
NFUDAT (1.A7h) – Nand Flash Controller User Data Register
7
6
5
4
3
2
1
0
NFUD7
NFUD6
NFUD5
NFUD4
NFUD3
NFUD2
NFUD1
NFUD0
Bit
Bit
Number
Mnemonic Description
Nand Flash User Data Byte
User defined byte stored in byte position 3 of each spare zone.
7-0
NFUD7:0
Reset Value = 0000 0000b
189
7632A–MP3–03/06
ATMEL [ ATMEL ]
