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85C51SND3B1 参数 Datasheet PDF下载

85C51SND3B1图片预览
型号: 85C51SND3B1
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片数字音频解码器 - 编码器与USB 2.0接口 [Single-Chip Digital Audio Decoder - Encoder with USB 2.0 Interface]
分类和应用: 解码器编码器
文件页数/大小: 263 页 / 3620 K
品牌: ATMEL [ ATMEL ]
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AT85C51SND3Bx  
Bit  
Bit  
Number  
Mnemonic Description  
Endpoint Bank Bits  
Set this field according to the endpoint size:  
00b: Single bank  
3-2  
EPBK1:0  
01b: Double bank  
1xb: Reserved. Do not use this configuration.  
Endpoint Allocation Bit  
Set this bit to allocate the endpoint memory.  
Clear to free the endpoint memory.  
See Section “Endpoint Activation” for more details.  
1
0
ALLOC  
-
Reserved  
The value read from these bits is always 0. Do not set these bits.  
Reset Value = 0000 0000b  
Table 124. UESTA0X Register  
UESTA0X (1.CEh) – USB Endpoint Status 0 Register  
7
6
5
4
3
2
1
0
CFGOK  
OVERFI  
UNDERFI  
ZLPSEEN  
DTSEQ1  
DTSEQ0 NBUSYBK1 NBUSYBK0  
Bit  
Bit  
Number  
Mnemonic Description  
Configuration Status Flag  
Set by hardware when the endpoint X size parameter (EPSIZE) and the bank  
parametrization (EPBK) are correct compared to the max FIFO capacity and the  
max number of allowed bank. This bit is updated when the bit ALLOC is set.  
If this bit is cleared, the user should reprogram the UECFG1X register with  
correct EPSIZE and EPBK values.  
7
6
CFGOK  
OVERFI  
Overflow Error Interrupt Flag  
Set by hardware when an overflow error occurs in an isochronous endpoint. An  
interrupt (EPINTx) is triggered (if enabled).  
See Section “Isochronous Mode” for more details.  
Shall be cleared by software. Setting by software has no effect.  
Flow Error Interrupt Flag  
Set by hardware when an underflow error occurs in an isochronous endpoint. An  
interrupt (EPINTx) is triggered (if enabled).  
See Section “Isochronous Mode” for more details.  
5
4
UNDERFI  
ZLPSEEN  
Shall be cleared by software. Setting by software has no effect.  
Zero Length Packet Seen (bit / Flag)  
Set by hardware, as soon as a ZLP has been filtered during a transfer.  
Shall be cleared by the software. Setting by software has no effect.  
Data Toggle Sequencing Flag  
Set by hardware to indicate the PID data of the current bank:  
00b: Data0  
01b: Data1  
3-2  
DTSEQ1:0  
1xb: Reserved.  
For OUT transfer, this value indicates the last data toggle received on the current  
bank.  
For IN transfer, it indicates the Toggle that will be used for the next packet to be  
sent. This is not relative to the current bank.  
121  
7632A–MP3–03/06  
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