AT85C51SND3Bx
Bit
Bit
Number
Mnemonic Description
Suspend Interrupt Enable Bit
0
SUSPE
Set to enable the SUSPI interrupt.
Clear to disable the SUSPI interrupt.
Reset Value = 0000 0000b
Table 115. UDADDR Register
UDADDR (1.DBh) – USB Device Address Register
7
6
5
4
3
2
1
0
ADDEN
UADD6
UADD5
UADD4
UADD3
UADD2
UADD1
UADD0
Bit
Bit
Number
Mnemonic Description
Address Enable Bit
Set to activate the UADD (USB address).
7
ADDEN
Cleared by hardware. Clearing by software has no effect.
See Section “Address Setup” for more details.
USB Address Bits
6-0
UADD6:0 Set to configure the device address.
Shall not be cleared.
Reset Value = 0000 0000b
Table 116. UDFNUMH Register
UDFNUMH (1.DCh) – USB Device Frame Number High Register
7
6
5
4
3
2
1
0
-
-
-
-
-
FNUM10
FNUM9
FNUM8
Bit
Bit
Number
Mnemonic Description
Reserved
7-3
2-0
-
The value read from these bits is always 0. Do not set these bits.
Frame Number Upper Flag
Set by hardware. These bits are the 3 MSB of the 11-bits Frame Number
information. They are provided in the last received SOF packet. FNUM is
updated if a corrupted SOF is received.
FNUM10:8
Reset Value = 0000 0000b
Table 117. UDFNUML Register
UDFNUML (1.DDh) – USB Device Frame Number Low Register
7
6
5
4
3
2
1
0
FNUM7
FNUM6
FNUM5
FNUM4
FNUM3
FNUM2
FNUM1
FNUM0
117
7632A–MP3–03/06