AT85C51SND3Bx
Bit
Bit
Number
Mnemonic Description
Reserved
7
-
The value read from these bits is always 0. Do not set these bits.
Endpoint FIFO Reset Bits
Set to reset the selected endpoint FIFO prior to any other operation, upon
hardware reset or when an USB bus reset has been received. See
Section “Endpoint Reset” for more information.
6-0
EPRST6:0
Then, cleared by software to complete the reset operation and start using the
FIFO.
Reset Value = 0000 0000b
Table 121. UECONX Register
UECONX (1.CBh) – USB Endpoint Control Register
7
6
5
4
3
2
1
0
-
-
STALLRQ STALLRQC
RSTDT
EPNUMS
DFCRDY
EPEN
Bit
Bit
Number
Mnemonic Description
Reserved
7-6
5
-
The value read from these bits is always 0. Do not set these bits.
STALL Request Handshake Bit
Set to request a STALL answer to the host for the next handshake.
Cleared by hardware when a new SETUP is received. Clearing by software has
no effect.
STALLRQ
See Section “STALL Request” for more details.
STALL Request Clear Handshake Bit
Set to disable the STALL handshake mechanism.
Cleared by hardware immediately after the set. Clearing by software has no
effect.
4
3
STALLRQC
See Section “STALL Request” for more details.
Reset Data Toggle Bit
Set to automatically clear the data toggle sequence:
For OUT endpoint: the next received packet will have the data toggle 0.
For IN endpoint: the next packet to be sent will have the data toggle 0.
Cleared by hardware instantaneously. The firmware does not have to wait that
the bit is cleared. Clearing by software has no effect.
RSTDT
Endpoint Number Select Bit
2
1
EPNUMS
DFCRDY
Set to configure the EPNUM used by the DFC.
Clear to select the EPNUM used by the CPU.
DFC Ready Bit
Set to resume/enable the DFC interface.
Clear to pause the DFC interface.
Endpoint Enable Bit
Set to enable the endpoint according to the device configuration. Endpoint 0 shall
always be enabled after a hardware or USB reset and participate in the device
configuration.
0
EPEN
Clear this bit to disable the endpoint. See Section “Endpoint Activation” for more
details.
Reset Value = 0000 0000b
119
7632A–MP3–03/06
ATMEL [ ATMEL ]
