Table 122. UECFG0X Register
UECFG0X (1.CCh) – USB Endpoint Configuration 1 Register
7
6
5
4
3
2
1
0
EPTYPE1:0
-
-
ISOSW
AUTOSW
NYETDIS
EPDIR
Bit
Bit
Number
Mnemonic Description
Endpoint Type Bits
Set this bit according to the endpoint configuration:
00b: Control10b: Bulk
01b: Isochronous11b: Interrupt
7-6
5-4
3
EPTYPE1:0
Reserved
-
The value read from these bits is always 0. Do not set these bits.
Isochronous Switch Bit
Set to automatically switch banks on each SOF.
Clear to disable the automatic bank switching on each SOF.
See Section “Isochronous Mode” for more details.
ISOSW
Automatic Switch Bit
Set to automatically switch bank when it is ready.
Clear to disable the automatic bank switching.
2
AUTOSW
See Section “OUT Endpoint Management” and Section “IN Endpoint
Management” for more details.
Not Yet Disable Bit
Set to automatically send a “ACK” handshake instead of “Not Yet” handshake.
Thus, the host will not have to “ping” for the next packet.
Clear to automatically send “Not Yet” handshake. Thus, the host will have to
“ping” for the next packet.
1
0
NYETDIS
EPDIR
Endpoint Direction Bit
Set to configure an IN direction for bulk, interrupt or isochronous endpoints.
Clear to configure an OUT direction for bulk, interrupt, isochronous or control
endpoints.
Reset Value = 0000 0000b
Table 123. UECFG1X Register
UECFG1X (1.CDh) – USB Endpoint Configuration 0 Register
7
6
5
4
3
2
1
0
-
EPSIZE2
EPSIZE1
EPSIZE0
EPBK1
EPBK
ALLOC
-
Bit
Bit
Number
Mnemonic Description
Reserved
7
-
The value read from these bits is always 0. Do not set these bits.
Endpoint Size Bits
Set this bit according to the endpoint size:
000b: 8 bytes100b: 128 bytes
001b: 16 bytes101b: 256 bytes
6-4
EPSIZE2:0
010b: 32 bytes110b: 512 bytes
011b: 64 bytes111b: Reserved. Do not use this configuration.
120
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
