Interrupt
The SPI handles 2 interrupt sources that are the “end of transfer” and the “mode fault”
flags.
As shown in Figure 109, these flags are combined toghether to appear as a single inter-
rupt source for the C51 core. The SPIF flag is set at the end of an 8-bit shift in and out
and is cleared by reading SPSTA and then reading from or writing to SPDAT.
The MODF flag is set in case of mode fault error and is cleared by reading SPSTA and
then writing to SPCON.
The SPI interrupt is enabled by setting ESPI bit in IEN1 register. This assumes inter-
rupts are globally enabled by setting EA bit in IEN0 register.
Figure 109. SPI Interrupt System
SPIF
SPI Controller
Interrupt Request
SPSTA.7
MODF
SPSTA.4
ESPI
IEN1.2
162
AT8xC51SND2C
4341D–MP3–04/05
ATMEL [ ATMEL ]
