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PA7572 参数 Datasheet PDF下载

PA7572图片预览
型号: PA7572
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程电可擦除逻辑阵列 [Programmable Electrically Erasable Logic Array]
分类和应用:
文件页数/大小: 10 页 / 323 K
品牌: ANACHIP [ ANACHIP CORP ]
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Table 4. A.C Electrical Characteristics Combinatorial  
Over the Operating Range  
-20/I-20  
Symbol  
Parameter6,12  
Unit  
Min  
Max  
Propagation delay Internal (tAL + tLC  
)
Propagation delay External (tIA + tAL +tLC + tLO  
Input or I/O pin to array input  
13  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
t
PDI  
)
20  
2
t
PDX  
t
IA  
Array input to LCC  
12  
1
t
AL  
LC  
LO  
LCC input to LCC output10  
t
LCC output to output pin  
5
t
Output Disable, Enable from LCC output7  
Output Disable, Enable from input pin7  
5
t
, t  
OD OE  
20  
t
OX  
This device has been designed and tested for the recommended operating conditions. Proper operation outside of these  
levels is not guaranteed. Exposure to absolute maximum ratings may cause permanent damage  
Figure 15. Combinatorial Timing - Waveforms and Block Diagram  
Anachip Corp.  
www.anachip.com.tw  
Rev. 1.0 Dec 16, 2004  
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