AS3525-A/-B C22O22
Data Sheet, Confidential
7.2.8 Memory Stick / Memory Stick Pro Interface
The Sony memory stick interface is an AHB bus slave device. This interface conforms to following standards:
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Memory Stick Standard Format Specifications version 1.4-00
Memory Stick PRO Format Specifications version 1.00-01
7.2.8.1 Block Diagram
The memory stick interface contains two main blocks, the ICON and the host controller.
Figure 14 SONY memory stick interface block diagram
7.2.8.2 I-CON
This IP is Memory Stick / Memory Stick PRO Host Controller automatic control IP with a 32-bit CPU interface. This IP automatically controls the
series of TPC-based communication with the Memory Stick in place of the CPU, and aims to reduce the burden on the Host CPU.
The contents of communication with the Memory Stick are designated in this IP by micro codes.
Features
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32-bit CPU interface
Inside controller specified by microcodes
Buffer for two-way data transmission loaded (256 byte x 2)
32/16 bit access available
DMA support
General-purpose data transmit/receive FIFO (12 Bytes)
7.2.8.3 Host Controller
Features
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Memory Stick and Memory Stick PRO support
FiFo memory (64 bits × 4) for two-way data transmission
Built-in CRC circuit
Memory Stick serial clock (Serial: 20 MHz (max.), Parallel: 40 MHz (max.))
DMA support
16/32/64-bit access possible
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