AS3525-A/-B C22O22
Data Sheet, Confidential
Name
Base
Default
0x00
CCU_SRC
AS3525_CCU_BASE
Software Reset Control Register
Offset: 0x0000h
Writing a logic 1 to the single bits in the read/write register enables resets to each
module.
Bit
16
Bit Name
UART_EN
Default
Access
Bit Description
1: enable UART interface reset
0: disable UART interface reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
15
14
13
12
11
10
9
NAF_EN
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1: enable NAND flash/Smart Media interface reset
0: disable NAND flash/Smart Media interface reset
1: enable secure digital/multimedia interface reset
0: disable secure digital/multimedia interface reset
1: enable general purpose IO reset
0: disable general purpose IO reset
1: enable audio I2C interface reset
0: disable audio I2C interface reset
1: enable master/slave I2C interface reset
0: disable master/slave I2C interface reset
1: enable memory stick interface reset
0: disable memory stick interface reset
1: enable I2S input interface reset for APB part
0: disable I2S input interface reset for APB part
1: enable I2S output interface reset for APB part
0: disable I2S output interface reset for APB part
1: enable USB AHB reset
SDMCI_EN
GPIO_EN
I2C_AUDIO_EN
I2C_EN
MMS_EN
I2SI_APB_EN
I2SO_APB_EN
USB_AHB_EN
USB_PHY_EN
DMAC_EN
VIC_EN
8
7
0: disable USB AHB reset
1: enable USB PHY reset
0: disable USB PHY reset
1: enable DMA controller reset
6
5
0: disable DMA controller reset
4
1: enable vectored interrupt cell reset
0: disable vectored interrupt cell reset
1: enable RAMC reset
0: disable RAMC reset
1: enable 1TRAM reset
3
RAMC_EN
1TRAM_EN
MPMC_EN
BRIDGE_EN
2
0: disable 1TRAM reset
1
1: enable external memory AHB reset
0: disable external memory AHB reset
1: enable bridge reset
0
0: disable bridge reset
Table 90 Software Reset Lock Register
Name
Base
AS3525_CCU_BASE
Software Reset Lock Register
Default
0x00
CCU_SRL
Use of this register enables the software reset selected with Software Reset Control
Register. Writing a value of 0x1A720212 will enable the selected reset; writing any
other value will not enable software reset.
Offset: 0x0004h
Bit
Bit Name
Default
Access
Bit Description
0:31
software_reset_lock
0
R/W
0x1A720212: enables selected reset
Other values: no effect
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