A25LQ080 Series
Read Data Bytes at Higher Speed by Quad Input and Quad Output (FAST_READ_QUAD_INPUT_OUTPUT)
The
FAST_READ_QUAD_INPUT_OUTPUT
(EBh)
Instruction.
Similar
FAST_READ_QUAD_INPUT_OUTPUT
operate at the highest possible frequency of fC (See AC
Characteristics).
instruction is similar to the FAST_READ (0Bh) instruction
except the data is input and output on four pins (IO3, IO2, IO1,
IO0) instead of just DO. This allows data to be transferred
from the A25LQ080 at quadruple the rate of standard SPI
devices. The Quad Enable bit (QE) of Status Register-2 must
be set to enable the FAST_READ_QUAD_INPUT_OUTPUT
to
the
FAST_READ
instruction,
instruction
the
can
Figure 12. FAST_READ_QUAD_INPUT_OUTPUT Instruction and Data-Out Sequence
S
6
0
1
2
3
4
5
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
C
IO Switches from
Input to Output
Instruction (EBh)
20
21
12
13
4
5
0
1
0
4
16
17
8
9
4
5
0
IO0
4
IO1
1
5
1
5
IO2
IO3
22
23
14
15
6
7
2
3
2
3
6
7
2
3
18
19
10
11
6
7
6
7
Data out 1 Data out 2
Dummy Dummy Dummy
A23-16 A15-8 A7-0
Note: Address bits A23 to A20 are Don’t Care, for A25LQ080.
(April, 2016, Version 1.0)
22
AMIC Technology Corp.
AMICC [ AMIC TECHNOLOGY ]
