Data Sheet
FS7140-01 / FS7140-01g / FS7145 Programmable Phase-Locked Loop Clock Generator
Table 4: FS7145 Register Map
ADDRESS
BYTE 7
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
(Bit 63)
(Bit 62)
(Bit 61)
(Bit 60)
(Bit 59)
(Bit 58)
(Bit 57)
(Bit 56)
Must be set to “0”
Must be set to “0”
Must be set to “0”
Must be set to “0”
Must be set to “0”
Must be set to “0”
Must be set to “0”
Must be set to “0”
RESERVED
RESERVED
SHUT2
(Bit 53)
RESERVED
RESERVED
RESERVED
SYNCPOL
(Bit 49)
SYNCEN
(Bit 48)
(Bit 55)
(Bit 54)
(Bit 52)
(Bit 51)
(Bit 50)
BYTE 6
BYTE 5
0 = Normal
1 = Powered Down
“0” = negative
“1” = positive
“0” = negative
“1” = positive
Must be set to “0”
Must be set to “0”
Must be set to “0”
Must be set to “0”
Must be set to “0”
RESERVED
LC
(Bit 46)
LR[1]
(Bit 45)
LR[0]
(Bit 44)
RESERVED
RESERVED
CP[1]
(Bit 41)
CP[0]
(Bit 40)
(Bit 47)
(Bit 43)
(Bit 42)
Loop Filter Cap
Select
Must be set to “0”
Loop Filter Resistor Select
Must be set to “0”
Must be set to “0”
Charge Pump Current Select
CMOS
(Bit 39)
FBKDSRC
(Bit 38)
FBKDIV[13]
FBKDIV[12]
FBKDIV[11]
FBKDIV[10]
FBKDIV[9]
(Bit 33)
FBKDIV[8]
(Bit 32)
(Bit 37)
(Bit 36)
(Bit 35)
(Bit 34)
BYTE 4
0 = VCO Output
1 = Post Divider
Output
8192
4096
2048
1024
512
256
0 = PECL
1 = CMOS
See Section 4.1.2 for disallowed FBKDIV values
FBKDIV[7]
(Bit 31)
FBKDIV[6]
(Bit 30)
FBKDIV[5]
(Bit 29)
FBKDIV[4]
(Bit 28)
FBKDIV[3]
(Bit 27)
FBKDIV[2]
(Bit 26)
FBKDIV[1]
(Bit 25)
FBKDIV[0]
(Bit 24)
BYTE 3
BYTE 2
128
64
32
16
8
4
2
1
See Section 4.1.2 for disallowed FBKDIV values
POST2[3]
(Bit 23)
POST2[2]
(Bit 22)
POST2[1]
(Bit 21)
POST2[0]
(Bit 20)
POST1[3]
(Bit 19)
POST1[2]
(Bit 18)
POST1[1]
(Bit 17)
POST1[0]
(Bit 16)
Modulus = N+1 (N=0 to 11)
See Table 8
Modulus = N+1 (N=0 to 11)
See Table 8
POST3[1]
(Bit 15)
POST3[0]
(Bit 14)
SHUT1
(Bit 13)
REFDSRC
(Bit 12)
REFDIV[11]
REFDIV[10]
REFDIV[9]
REFDIV[8]
(Bit 11)
(Bit 10)
(Bit 9)
(Bit 8)
BYTE 1
BYTE 0
Modulus = 1, 2, 4, or 8
See Table 8
0 = Normal
1 = Powered Down
0 = Crystal Oscillator
1 = REF Pin
2048
1024
512
256
REFDIV[7]
REFDIV[6]
REFDIV[5]
REFDIV[4]
REFDIV[3]
REFDIV[2]
REFDIV[1]
REFDIV[0]
(Bit 7)
(Bit 6)
(Bit 5)
(Bit 4)
(Bit 3)
(Bit 2)
(Bit 1)
(Bit 0)
128
64
32
16
8
4
2
1
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