Data Sheet
FS7140-01 / FS7140-01g / FS7145 Programmable Phase-Locked Loop Clock Generator
S
DEVICE ADDRESS
W
A
REGISTER ADDRESS
A
DATA
A P
7-bit Receive
Device Address
Register Address
Acknowledge
Data
Acknowledge
STOP Condition
Acknowledge
START
Command
WRITE Command
From bus host
to device
From device
to bus host
Figure 4: Random Register Write Procedure
S
DEVICE ADDRESS
W
A
REGISTER ADDRESS
A
S
DEVICE ADDRESS
R
A
DATA
A P
7-bit Receive
Device Address
7-bit Receive
Device Address
Register Address
Acknowledge
Data
Acknowledge
STOP Condition
NO Acknowledge
Repeat START
START
Command
WRITE Command
Acknowledge
READ Command
From bus host
to device
From device
to bus host
Figure 5: Random Register Read Procedure
S
DEVICE ADDRESS
W
A
REGISTER ADDRESS
A
DATA
A
DATA
A
DATA
A P
7-bit Receive
Device Address
Register Address
Acknowledge
Data
Data
Data
Acknowledge
Acknowledge
Acknowledge
Acknowledge
START
Command
WRITE Command
STOP Command
From bus host
to device
From device
to bus host
Figure 6: Sequential Register Write Procedure
S
DEVICE ADDRESS
W
A
REGISTER ADDRESS
A
S
DEVICE ADDRESS
R
A
DATA
A
DATA
A P
7-bit Receive
Device Address
7-bit Receive
Device Address
Register Address
Acknowledge
Data
Data
Acknowledge
Acknowledge
NO Acknowledge
Repeat START
START
Command
WRITE Command
Acknowledge
READ Command
STOP Command
From bus host
to device
From device
to bus host
Figure 7: Sequential Register Read Procedure
AMI Semiconductor - Rev.
3.0
7
www.amis.com
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