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AM79C978KC/W 参数 Datasheet PDF下载

AM79C978KC/W图片预览
型号: AM79C978KC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片1/10 Mbps的PCI家庭网络控制器 [Single-Chip 1/10 Mbps PCI Home Networking Controller]
分类和应用: 控制器PC
文件页数/大小: 261 页 / 3499 K
品牌: AMD [ AMD ]
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0
IOSPACE I/O space indicator. Read as one;  
write operations have no effect.  
Indicating that this base address  
register describes an I/O base  
address.  
memory space requirement of 32  
bytes.  
3
PREFETCH Prefetchable. Read as zero; write  
operations have no effect. Indi-  
cates that memory space con-  
trolled by this base address  
register is not prefetchable. Data  
in the memory mapped I/O space  
cannot be prefetched. Because  
one of the I/O resources in this  
address space is a Reset regis-  
ter, the order of the read access-  
es is important.  
PCI Memory Mapped I/O Base Address Register  
Offset 14h  
The PCI Memory Mapped I/O Base Address register is  
a 32-bit register that determines the location of the  
Am79C978 I/O resources in all of memory space. It is  
located at offset 14h in the PCI Configuration Space.  
Bit  
Name  
Description  
2-1  
TYPE  
Memory type indicator. Read as  
zeros; write operations have no  
effect. Indicates that this base ad-  
dress register is 32 bits wide and  
mapping can be done anywhere  
in the 32-bit memory space.  
31-5  
MEMBASE Memory mapped I/O base ad-  
dress most significant 27 bits.  
These bits are written by the host  
to specify the location of the  
Am79C978 I/O resources in all of  
memory space. MEMBASE must  
be written with a valid address  
before the Am79C978 controller  
slave memory mapped I/O mode  
is turned on by setting the ME-  
MEN bit (PCI Command register,  
bit 1).  
0
MEMSPACE Memory space indicator. Read  
as zero; write operations have no  
effect. Indicates that this base ad-  
dress register describes a memo-  
ry base address.  
PCI Subsystem Vendor ID Register  
When the Am79C978 controller  
is enabled for memory mapped  
I/O mode (MEMEN is set), it mon-  
itors the PCI bus for a valid mem-  
ory command. If the value on  
AD[31:5] during the address  
phase of the cycles matches the  
Offset 2Ch  
The PCI Subsystem Vendor ID register is a 16-bit reg-  
ister that together with the PCI Subsystem ID uniquely  
identifies the add-in card or subsystem the Am79C978  
controller is used in. Subsystem Vendor IDs can be ob-  
tained from the PCI SIG. A value of 0 (the default) indi-  
cates that the Am79C978 controller does not support  
subsystem identification. The PCI Subsystem Vendor  
ID is an alias of BCR23, bits 15-0. It is programmable  
through the EEPROM.  
value  
of  
MEMBASE,  
the  
Am79C978 controller will drive  
DEVSEL indicating it will respond  
to the access.  
MEMBASE is read and written by  
the host. MEMBASE is cleared  
by H_RESET and is not affected  
by S_RESET or by setting the  
STOP bit.  
The PCI Subsystem Vendor ID register is located at off-  
set 2Ch in the PCI Configuration Space. It is read only.  
PCI Subsystem ID Register  
Offset 2Eh  
The PCI Subsystem ID register is a 16-bit register that  
together with the PCI Subsystem Vendor ID uniquely  
identifies the add-in card or subsystem the Am79C978  
controller is used in. The value of the Subsystem ID is  
up to the system vendor. A value of 0 (the default) indi-  
cates that the Am79C978 controller does not support  
subsystem identification. The PCI Subsystem ID is an  
alias of BCR24, bits 15-0. It is programmable through  
the EEPROM.  
4
MEMSIZE  
Memory mapped I/O size re-  
quirements. Read as zeros; write  
operations have no effect.  
MEMSIZE indicates the size of  
the  
memory  
space  
the  
Am79C978 controller requires.  
When the host writes a value of  
FFFF FFFFh to the Memory  
Mapped I/O Base Address regis-  
ter, it will read back a value of 0 in  
bit 4. That indicates a Am79C978  
The PCI Subsystem ID register is located at offset 2Eh  
in the PCI Configuration Space. It is read only.  
Am79C978  
107  
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