AMD
Fig u re 7 -7
Re c e ive r Tim in g in Au t o -Re p e a t Co n fig u ra t io n
Serial
Data
Sync
Data 1
Data 2
Data 3
CNB1
IGM1
CNB2
IGM2
CNB3
IGM3 =
CNB1
12330E-29
Note:
Only when a Receiver has a CNB = 1, can it accept new data. It then raises its IGM when it sees a non-Sync
byte. It won’t accept another data byte until it’s CNB has gone LOW and HIGH again.
When IGM1 goes high, CNB2 goes high. This allows RX2 to decode the next byte and
raise it’s IGM. IGM2 is connected to CNB3 and RX3 is now allowed to decode the next
byte and raise its IGM.
In Figure 7-8 since IGM3 = CNB1, CNB1 goes LOW.
When CNB1 goes LOW, RX1 is reset and it pulls it’s IGM LOW (t46 ns).
Since IGM1 is connected to CNB2, RX2 is reset and pulls its IGM LOW t46 ns later.
CNB3 = IGM2 goes LOW, which causes IGM3 to follow it LOW t46 ns later. IGM3 going
LOW makes CNB1 go HIGH again and RX1 is now set to receive the next byte of data
on the SERIN.
See Figure 7-9. Thus, the cycle starts over again.
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TAXIchip Integrated Circuits Technical Manual