DEVICE SPECIFICATION
S5933
PCI CONTROLLER
4.6 CLASS CODE REGISTER (CLCD)
Register Name:
Address Offset:
Power-up value:
Boot-load:
Class Code
09h-0Bh
This 24-bit, read-only register is divided into three
one-byte fields: the base class resides at location
0Bh, the sub-class at 0Ah, and the programming in-
terface at 09h. The default setting for the base class
is all ones (FFh), which indicates that the device
does not fit into the thirteen base classes defined in
the PCI Local Bus Specification. It is possible, how-
ever, through use of the external non-volatile
memory, to implement one of the defined class codes
described in Table 4-7 below.
FF0000h
External nvRAM offset
049h-4Bh
Attribute:
Size:
Read Only
24 bits
For devices that fall within the seven defined class
codes, sub-classes are also assigned. Tables 4-8
through 4-20 describe each of the sub-class codes
for base codes 00h through 0Ch, respectively.
Figure 4-6. Class Code Register
@0Bh
@0Ah
@09h
(Offset)
0 (Bit)
7
0
7
0
7
Base Class
Sub-Class
Prog I/F
Table 4-7. Defined Base Class Codes
Base-Class
00h
Description
Early, pre-2.0 PCI specification devices
Mass storage controller
Network controller
Display controller
01h
02h
03h
04h
Multimedia device
Memory controller
Bridge device
05h
06h
07h
Simple communication controller
Base system peripherals
Input devices
08h
09h
0Ah
Docking stations
0Bh
Processors
0Ch
Serial bus controllers
Reserved
0D-FEh
FFh
Device does not fit defined class codes (default)
Table 4-8. Base Class Code 00h: Early, Pre-2.0 Specification Devices
Sub-Class
Prog I/F
Description
All devices other than VGA
VGA-compatible device
00h
01h
00h
00h
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 • (619) 450-9333
4-11
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
