S3098CB12 参数 Datasheet PDF下载

S3098 – SONET/SDH/ATM OC-192 1:16

Low Power Receiver w/CDR/Postamp

Revision NC - Oct 17, 2001

DEVICE SPECIFICATION

FIGURES

Figure 1. System Block Diagram ............................................................................................................................. 1

Figure 2. Functional Block Diagram ......................................................................................................................... 5

Figure 3. S3098 Pinout (Top View) ........................................................................................................................ 12

Figure 4. Compact 15 mm x 15 mm 148-pin CBGA Package ................................................................................ 13

Figure 5. Parallel Data Output Delay from POCLK ................................................................................................ 19

Figure 6. Differential Voltage Measurement .......................................................................................................... 19

Figure 7. Single-Ended Data Input Voltage Measurement .................................................................................... 20

Figure 8. S3098 LVDS Output to LVDS Input ........................................................................................................ 20

Figure 9. -5.2 V ECL Post Amp to S3098 Input DC Coupled Termination ............................................................. 20

Figure 10. -5.2 V ECL TIA to S3098 DC Coupled Termination .............................................................................. 21

Figure 11. +3.3 V Differential LVPECL Driver to S3098 LVPECL Reference Clock Input, AC Coupled Termination 21

Figure 12. External Loop Filter ............................................................................................................................... 21

Figure 13. Single-Ended Termination Scheme ...................................................................................................... 22

TABLES

Table 1. Reference Frequency ................................................................................................................................ 6

Table 2. SDLVCMOSN Connections when using SDLVPECLN Input ..................................................................... 6

Table 3. SDLVPECLN Connections when using SDLVCMOSN Input ..................................................................... 6

Table 4. Input Pin Description and Assignment ....................................................................................................... 9

Table 5. Output Pin Descriptions and Assignment ................................................................................................ 10

Table 6. Common Pin Descriptions and Assignment ............................................................................................. 11

Table 7. Package Thermals ................................................................................................................................... 13

Table 8. Performance Specifications ..................................................................................................................... 14

Table 9. Absolute Maximum Ratings ..................................................................................................................... 15

Table 10. Recommended Operating Conditions .................................................................................................... 16

Table 11. Internally Biased Differential CML Input DC Characteristics .................................................................. 16

Table 12. LVDS Output Characteristics ................................................................................................................. 17

Table 13. Internally Biased Differential LVPECL Input DC Characteristics (REFCLKP/N) .................................... 17

Table 14. Single-Ended LVPECL Input DC Characteristics (SDLVPECLN) .......................................................... 17

Table 15. LVCMOS Input DC Characteristics ........................................................................................................ 18

Table 16. LVCMOS Output DC Characteristics ..................................................................................................... 18

Table 17. AC Characteristics ................................................................................................................................. 18

Table 18. External Loop Filter Components .......................................................................................................... 19

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