SONET/SDH OC-12 TO OC-48 MUX/DEMUX
S3045
Figure 2. Functional Block Diagram
*A. J0/Z0 Insertions
*B. M1 Calculations &
insertions
*C. B2 Calculations
and Insertions
*D. B1 Calculation
and Insertion
PARFPTXSEL
SCRBENB
FIFO
Register
Parity
B2/M1SELB
B1SELB
1
1
Calculation
PARIN A
PINA
PARERR A
8
PICLK
8 bit
Register
PARIN B
PINB
PARERR B
8
8
8
D*
A* B*
8
C*
Scrambler
311DATOUT
Register
Register
Register
Byte
Interleave
Mux
PICLK
1
1
PARIN C
PINC
PARERR C
8
8
B1 Parity
Calculation &
Insertion
311CLKOUT
J0/Z0SEL
PICLK
PARIN D
PIND
PARERR D
READP/N
PICLK
Register
PULSEP/N
PCLK A,B,C,D
Transmit Clock
Divider
311TCLK
Frame
Control
Counter
4
TIFP A,B,C,D
SYNCRSTB
TRANSMITTER
RECEIVER
LB_FRAME
PARSEL
DSCRBENB
PAROUT A,B,C,D
POUT A
SDVBB
SDLVPECL
SDLVTTL
SQUELCHB
DLEB
4
8
8
MUX
2*
Byte
Interleave
Demux
1*
POUT B
Register
8
8
8
Descrambler
POUT C
POUT D
311DATIN
PARFPRXSEL
POCLK A,B,C,D
4
311CLKIN
FRAME
PULSEOOF
OOF
Frame
Control
Counter &
Alarm
4
B1 Parity
FP A,B,C,D
STS-12
Calculation
Insertion
Calculation for
STS-48 and the
number 1 STS-12
frames
Detection
J0FP
FPSEL
LOS
*1. Extract STS-48 B1
for Comparison
Receive Clock
Divider
*2. LOS monitoring
B1ERR
RSTB
3
December 13, 1999 / Revision E
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
