SONET/SDH OC-3/12 TRANSMITTER AND RECEIVER
S3005/S3006
S3005 Pin Assignment and Descriptions (Continued)
Pin #
Pin #
Pin Name
Level I/O
Description
(80 PQFP) (68 LDCC)
LOCKDET
TTL
O
52
56
Lock detect signal. Goes high after the PLL has had
time to lock onto the clock provided on the REFCLK
pins (approx. 2000 REFCLK cycles). LOCKDET is
an asynchronous output.
CAP1
CAP2
–
I
–
–
The loop filter capacitor is connected to these pins.
The capacitor value should be 0.01µf ±10%
tolerance, X7R dielectric. 50 V is recommended (16
V is acceptable).
1,2,
79, 80
AGND
AVEE
GND
–
–
5, 56, 65,
71, 76
32, 37, Analog Ground (0V)
42, 48, 54
–4.5V
4, 57, 63,
67, 73
33, 40, Power Supply (–4.5V)
46, 50, 53
ECLGND
GND
–
7, 15, 19, 4, 13, 18, ECL Ground (0V)
22, 26, 25, 34,
35, 39, 52, 61, 68
42, 46, 54
VEE
–4.5V
GND
–
–
8, 14, 27, 6, 7, 11, Power Supply (–4.5V)
34, 47, 53 24, 30, 62
TTLGND
20, 41
21, 40
22, 64, 67 TTL Ground (0V)
1, 17, 19 Power Supply (+5V)
VCC
NC
+5V
–
–
–
3, 13, 23,
38, 55,
35, 55
No connection
58, 59,
60, 61, 78
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 • (619) 450-9333
12
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
