S2046/S2050
GIGABIT ETHERNET CHIPSET
Description
Table 5. S2046 Pin Assignment and Descriptions (Continued)
Pin Name Level I/O
Pin #
REFSEL
Static
TTL
I
18
Reference Select. Selects the reference clock frequency. (See
Table 1.)
ECLVCC
TTLGND
+3.3V
GND
–
–
21, 39
Core +3.3V
TTL Ground
14, 15,
34
TTLVCC
+5V/
3.3V
–
17
TTL Power Supply
ECLIOVCC
ECLIOVEE
AVCC
+3.3V
GND
+3.3V
GND
GND
–
–
–
–
–
3, 10
6, 7
PECL I/O Power Supply
PECL I/O GND
27, 32
26, 33
Analog Power Supply
Analog Ground
AVEE
ECLVEE
13, 40,
51, 52
Core Ground
NC
–
–
45, 46
Not Connected
March 29, 2000 / Revision B
8