1.6 GBPS QUAD SERIAL BACKPLANE DEVICE
S2009
Table 12. Mode Control Signals
Pin Name
Level
I/O
Pin #
Description
CH_LOCK
TTL
I
E4
Channel Lock. Parallel input mode control. CH_LOCK High locks
all four channels together. (See Table 1.)
REFCLK
TTL
TTL
I
I
H17
C15
Reference Clock. Used for the transmit VCO and frequency check
for the clock recovered from the receiver serial data.
RESET_N
Reset. When Low, the S2009 is held in reset. The receiver PLL is
forced to lock to the REFCLK. The FIFOs are initialized on the rising
edge of RESET_N. When High, the S2009 operates normally.
RATE
TTL
TTL
TTL
TTL
TTL
I
I
I
I
I
D12
E14
D16
F14
F15
Rate. When Low, the S2009 operates with the serial output rate
equal to the VCO frequency. When High, the S2009 operates with
the VCO internally divided by 2 for all functions.
SQLA_N
SQLB_N
SQLC_N
SQLD_N
Squelch Control for Channel A. When High, the serial outputs are
active. When Low, the transmitter output driver is powered down
and the outputs become inactive.
Squelch Control for Channel B. When High, the serial outputs are
active. When Low, the transmitter output driver is powered down
and the outputs become inactive.
Squelch Control for Channel C. When High, the serial outputs are
active. When Low, the transmitter output driver is powered down
and the outputs become inactive.
Squelch Control for Channel D. When High, the serial outputs are
active. When Low, the transmitter output driver is powered down
and the outputs become inactive.
Note: All TTL inputs except REFCLK have internal pull-up networks.
23
February 9, 2001 / Revision C
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
