Revision J – April 7, 2006
S2004 – Quad Serial Backplane Device
Data Sheet
Table 14. Receiver Output Pin Assignment and Descriptions (Continued)
Pin Name
Level
I/O
Pin #
Description
DOUTC7
DOUTC6
DOUTC5
DOUTC4
DOUTC3
DOUTC2
DOUTC1
DOUTC0
TTL
O
R7
R6
T5
U3
T4
R5
U2
T3
Channel C Receiver Data Outputs. Parallel data on this bus is valid on the rising
edge of RCCP in full clock mode and valid on the rising edge of both RCCP and
RCCN in half clock mode.
EOFC
TTL
TTL
O
O
R2
Channel C End of Frame Detected. A High on this output indicates that a valid
K28.5 has been detected and is present on the parallel data outputs DOUTC[0:7].
KFLAGC
P3
Channel C K-Character Flag. A High in KFLAGC indicates that a valid control
character has been detected. Data present on the parallel interface DOUTC[0:7]
should be used to indicate which character was received.
ERRC
TTL
TTL
O
O
T2
Channel C Receive Error. A High on ERRC signifies the occurrence of either a
parity error or an invalid codeword error during decoding of the received data.
RCCP
RCCN
U5
U4
Receive Data Clock. Parallel receive data, DOUTC[0:7], EOFC, KFLAGC, and
ERRC are valid on the rising edge of RCCP when in full clock mode and valid on
the rising edge of both RCCP and RCCN in half clock mode.
DOUTD7
DOUTD6
DOUTD5
DOUTD4
DOUTD3
DOUTD2
DOUTD1
DOUTD0
TTL
O
U11
R10
U9
R9
T9
U8
U7
T8
Channel D Receiver Data outputs. Parallel data on this bus is valid on the rising
edge of RCDP in full clock mode and valid on rising edge of both RCDP and
RCDN in half clock mode.
EOFD
TTL
TTL
O
O
U6
Channel D End of Frame Detected. A High on this output indicates that a valid
K28.5 has been detected and is present on the parallel data outputs DOUTD[0:7].
KFLAGD
T7
Channel D K-Character Flag. A High in KFLAGD indicates that a valid control
character has been detected. Data present on the parallel interface DOUTD[0:7]
should be used to indicate which character was received.
ERRD
TTL
TTL
O
O
T6
Channel D Receive Error. A High on ERRD signifies the occurrence of either a
parity error or an invalid codeword error during decoding of the received data.
RCDP
RCDN
T10
U10
Receive Data Clock. Parallel receive data, DOUTD[0:7], EOFD, KFLAGD, and
ERRD are valid on the rising edge of RCDP when in full clock mode and valid on
the rising edge of both RCDP and RCDN in half clock mode.
RXAP
RXAN
Diff.
LVPECL
I
I
I
I
A2
A3
Differential LVPECL compatible inputs for channel A. RXAP is the positive input,
RXAN is the negative. Internally biased to VDD -1.3V for AC coupled applications.
RXBP
RXBN
Diff.
LVPECL
A5
B5
Differential LVPECL compatible inputs for channel B. RXBP is the positive input,
RXBN is the negative. Internally biased to VDD -1.3V for AC coupled applications.
RXCP
RXCN
Diff.
LVPECL
A8
A9
Differential LVPECL compatible inputs for channel C. RXCP is the positive input,
RXCN is the negative. Internally biased to VDD -1.3V for AC coupled applications.
RXDP
RXDN
Diff.
LVPECL
B11
B12
Differential LVPECL compatible inputs for channel D. RXDP is the positive input,
RXDN is the negative. Internally biased to VDD -1.3V for AC coupled applications.
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