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PPC440GP-3RC400C 参数 Datasheet PDF下载

PPC440GP-3RC400C图片预览
型号: PPC440GP-3RC400C
PDF下载: 下载PDF文件 查看货源
内容描述: 的Power PC 440GP嵌入式处理器 [Power PC 440GP Embedded Processor]
分类和应用: 微控制器和处理器外围集成电路微处理器PC时钟
文件页数/大小: 83 页 / 1393 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
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Revision 1.07 – October 4, 2007  
440GP – Power PC 440GP Embedded Processor  
Data Sheet  
I/O Timing—DDR SDRAM T  
and T  
DIN  
SIN  
Notes:  
1. TSIN = Delay from DQS at package pin to C on Stage 1 FF.  
2. TDIN = Delay from data at package pin to D on Stage 1 FF.  
3. The time values for TSIN include 1/4 of a cycle at the indicated clock speed.  
TSIN (ns)  
minimum  
TSIN (ns)  
maximum  
TDIN (ns)  
minimum  
TDIN (ns)  
maximum  
Clock Speed (MHz)  
Signal Name  
Signal Name  
133  
133  
133  
133  
133  
133  
133  
133  
133  
DQS0  
DQS1  
DQS2  
DQS3  
DQS4  
DQS5  
DQS6  
DQS7  
DQS8  
2.775  
2.775  
2.775  
2.775  
2.775  
2.775  
2.775  
2.775  
2.775  
3.775  
3.775  
3.775  
3.775  
3.775  
3.775  
3.775  
3.775  
3.775  
MemData00:07  
MemData08:15  
MemData16:23  
MemData24:31  
MemData32:39  
MemData40:47  
MemData48:55  
MemData56:63  
ECC0:7  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
2.0  
2.0  
2.0  
2.0  
2.0  
2.0  
2.0  
2.0  
2.0  
In the following examples, the data strobes (DQS) and the data are shown to be coincident. There is actually a  
slight skew as specified by the SDRAM specifications, and there can be additional skew due to loading and signal  
routing. It is recommended that the signal length for all of the eight DQS signals be matched.  
76  
AMCC  
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